em6521 EM Microelectronic, em6521 Datasheet - Page 15

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em6521

Manufacturer Part Number
em6521
Description
Mfp Version Of Em6621 Ultra Low Power Microcontroller With 4x20 Lcd Driver
Manufacturer
EM Microelectronic
Datasheet
6.2
The EM6521 has one four bit general purpose CMOS input port. The port A input can be read at any time,
internal pull-up or pull-down resistors can be chosen by metal mask (for ROM version only). All selections
concerning port A are bit-wise executable. I.e. Pull-up on PA[2], pull-down on PA[0], positive IRQ edge on
PA[0] but negative on PA[1], etc.
In sleep mode the port A pull-up or pull-down resistors are turned off, and the inputs are deactivated except if
the InpResSleep bit in the option register OPTFSel is set to 1. In this case the port A inputs are continuously
monitored to match the input reset condition which will immediately wake the EM6521 from sleep mode (all pull
resistors remain).
Figure 10. Input Port A Configuration
6.2.1 IRQ on Port A
For interrupt request generation (IRQ) one can choose direct or debouncer input and positive or negative edge
IRQ triggering. With the debouncer selected ( OPTDebIntPA ) the input must be stable for two rising edges of
the selected debouncer clock (RegPresc). This means a worst case of 16 ms (default) or 2 ms (0.25 ms by
metal mask, for ROM Version only) with a system clock of 32 KHz.
Either a positive or a negative edge on the port A inputs - after debouncer or not - can generate an interrupt
request. This selection is done in the option register OPTIntEdgPA.
All four bits of port A can provide an IRQ, each pin with its own interrupt mask bit in the RegIRQMask1 register.
When an IRQ occurs, inspection of the RegIRQ1, RegIRQ2 and RegIRQ3 registers allows the interrupt to be
identified and treated.
At power on or after any reset the RegIRQMask1 is set to 0, thus disabling any input interrupt. A new interrupt
is only stored with the next active edge after the corresponding interrupt mask is cleared. See also the interrupt
chapter
It is recommended to mask the port A IRQ’s while one changes the selected IRQ edge. Else one may generate
a IRQ (Software IRQ). I.e. PA[0] on ‘0’ then changing from positive to negative edge selection on PA[0] will
immediately trigger an IRQPA[0] if the IRQ was not masked.
Copyright © 2005, EM Microelectronic-Marin SA
Vbat
(V
Port A
1 0.
1 1 3 H
V
DD
SS
Mask opt
MPAPD[n]
R
)
Mask opt
MPAPU[n]
PA[n]terminal
Ck[8]
Debouncer
Ck[11] or
Ck[14]
NoDebIntPA[n]=1
15
IntEdgPA[n]=0
Input Reset allowed
when in Sleep
www.emmicroelectronic.com
EM6521
PA3 for the
Millisecond
Counter
IRQPA[3:0]
NoPullPA[n]
Sleep
DB[3:0]
PA0, PA3
for 10-Bit
Counter
µP TestVar

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