pl-3507d-lf Prolific Technology Inc., pl-3507d-lf Datasheet - Page 15

• Manufacturer Part Number: pl-3507d-lf
• Description: Pl-3507 For Chip Rev D Hi-speed Usb & Ieee 1394 Combo To Ide Bridge Controller
• Manufacturer: Prolific Technology Inc.

7.2
The Clock and reset module not only control the system clocks for USB, 1394 and 8032, but is also
responsible for generating interrupts when USB/1394 connection status changes. At power on instance,
the active device is determined by the status of the hardware pin “EXTSEL_USB”, if any connection
status changes, an interrupt will be generated to report it. The firmware can read the status from clock
configuration register to know the current connection status and make a decision if active device switch
is necessary. After the bit “SEL_ACTIVE_DEV” is changed by the firmware, the instruction codes of the
new active device will be loaded into the internal program memory and then a system reset will be
generated during the loading of instruction codes.
Interrupt 1 is used to report USB/1394 cable connection status with host computer and extra GPIO’s
interrupts. If USB/1394 cable connection status changes, an interrupt (CABLE_DINT) will be generated.
There are three conditions that will generate such an interrupt:
Extra general-purpose input/output (GPIO) pins also have interrupt capability; they can be configured
as level/edge trigger type interrupts with positive/negative polarity.
EGPIO[5] is connected to internal USB remote wake-up port that can wake-up the PL-3507 from sleep
mode. All the sources of interrupt 1 can wake-up the PL-3507 from sleep mode no matter how PL-3507
went to sleep either from USB or 1394.
When active device is USB, the 1394 related blocks in the PL-3507 are turned-off for saving power,
vice versa. In order to consume less power, the firmware can turn off clock source of non-active device.
If the active device is USB, firmware can write a logic one value to bit 1 of clock configuration register
to turn off 1394 clock source from physical layer chip. If the active device is 1394, the USB clock
source from internal USB PHY can be kept running or stopped by USB suspend procedures before
switching the active device to 1394.
7.3
The PL-3507 uses internal ROM code (Chip 2D only) or external flash for CPU program execution.
During power on moment, the content of the internal ROM code or external program flash will be
shadowed into internal program SRAM for CPU program execution.
The PL-3507 also provides external data memory for firmware to store data or information. Using
PL-3507D Product Datasheet
Clock and Reset Module
Program and External Data Memory
The bit status of “DETECT_USB” changes, caused by USB cable plug/unplug.
The bit status of “DETECT_1394” changes, caused by 1394 cable plug/unplug.
The bit status of “EXT_SEL_USB” changes, caused by manual switch (optional).
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ds_pl3507D_v1.1.doc
Document Version 1.1
August 28, 2007
Revised Date: