ch7008a Chrontel, ch7008a Datasheet - Page 36

• Manufacturer Part Number: ch7008a
• Description: Digital Pc To Tv Encoder
• Manufacturer: Chrontel

CHRONTEL
Register Descriptions (continued)
Register 1BH, bit 4 (P-OUTP) controls the polarity of the P-OUT pin.
Register 1BH, bit 5 controls the P-OUT drive level, and should be set to 0 when DVDD2 is 1.8V, and set
to 1 when DVDD2 is 3.3V.
Register 1BH, bits 7 and 6 control the GPIO pins. When the corresponding GOENB bits are low, these
registers values are driven out of the GPIO pins. When the corresponding GOENB bits are high, these
registers values can be read to determine the level forced into the GPIO pins.
Register 1CH, bit 4 controls whether the Data Start pin or the Horizontal Sync pin is used to determine the
start of active video. When this bit is low, the pin continues to operate as the BCO pin described in the
BCO register section. When this bit is high the pin becomes an input for the Data Start signal. A value of
0 is recommended.
Register 1CH, bit 5 determines how the Data Start input is used. A value of 1 is recommended.
Register 1CH, bits 7and 6 control the GPIO pins direction. When a GOENB bit is low, the corresponding
GPIO pin is an output pin. When a GOENB bit is high, the corresponding GPIO pin can be read to deter-
mine the level forced into it.
36
Bit:
Symbol:
Type:
Default:
Bit:
Symbol:
Type:
Default:
7
GPIOIN1
R/W
0
7
GOENB1
R/W
1
6
GPIOIN0
R/W
0
6
GOENB0
R/W
1
5
DVDD2
R/W
0
5
DSM
R/W
1
4
P-OUTP
R/W
0
4
DSEN
R/W
1
3
FSCI19
R/W
0
3
FSCI15
R/W
0
2
FSCI18
0
2
FSCI14
0
201-0000-027 Rev 2.8, 6/24/2004
R/W
R/W
Symbol:
Address: 1BH
Bits: 8
Symbol:
Address: 1CH
Bits: 6
1
FSCI17
R/W
0
1
FSCI13
R/W
0
CH7008A
0
FSCI16
R/W
0
0
FSCI12
R/W
0