sii1161 Silicon image, sii1161 Datasheet - Page 17

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sii1161

Manufacturer Part Number
sii1161
Description
Panellink Receiver
Manufacturer
Silicon image
Datasheet

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SiI 1161 PanelLink Receiver
Data Sheet
Table 7 shows the calculations required for determining setup and hold timings using the clock period T
specific to the clock frequency, also bringing in the clock duty cycle as required when OCK_INV=0. The setup
and hold times apply to DE, VSYNC, HSYNC and Data output pins, as long as the appropriate T
used for the calculation in each case. The table also shows calculated setup and hold times for commonly used
ODCK frequencies.
OCK_INV=1 Case
For OCK_INV=1, the timing is similar to that previously discussed. The worst-case setup time occurs when the
clock to output delay is at a maximum (latest data) and the ODCK duty cycle is at a minimum (earliest falling
edge). Conversely, the worst case hold time occurs when the clock to output delay is at a minimum (earliest next
data) and the ODCK duty cycle is at a maximum (latest falling edge). This timing relationship is shown in Figure
6. The rising active ODCK edge is shown with an arrowhead.
Symbol
T
T
SU
HD
Data Setup Time to ODCK
=T
Data Hold Time from ODCK
=T
+ T
-T
ODCK
CK2OUT
ODCK
Table 7. Sample Calculation of Data Output Setup and Hold Times – OCK_INV=0
CK2OUT
*T
* (1 - T
{max}
DUTY
{min}
External clock
Note: For Staggered Output timing in 2Pix/clk mode, refer to Figure 15.
OCK_INV=1
Parameter
VSYNC
HSYNC
{min)
Internal
Figure 6. Receiver Output Setup and Hold Times – OCK_INV=1
DUTY
ODCK
Clock
with
DE
Q
{max})
T
= max
CK2OUT
50%
50%
Edge used
internally to clock
out Data (Q), DE,
VSYNC, HSYNC
T
Frequency
T
T
82.5 MHz
82.5 MHz
DUTY
165 MHz
165 MHz
DLY
DUTY
25 MHz
25 MHz
-
= max
= min
T
inverter delays
SU
13
T
40 ns
12 ns
40 ns
12 ns
6 ns
6 ns
ODCK
T
CK2OUT
External logic uses
this rising clock edge
to sample data
=1.5
=0.4
Max
Min
T
HD
(data)
=40*40% + 0.4 = 16.4ns
=40*40% - 1.5 = 14.5ns
=12*40% + 0.4 = 5.2ns
=12*40% - 1.5 = 3.3ns
=6*40% + 0.4 = 2.8ns
=6*40% - 1.5 = 0.9ns
T
= min
CK2OUT
Result
SiI-DS-0096-D
CK2OUT
value is
ODCK

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