mu9c8338a Music Semiconductors, Inc., mu9c8338a Datasheet - Page 27

• Manufacturer Part Number: mu9c8338a
• Description: Mu9c8338a 10/100mb Ethernet Filter Interface
• Manufacturer: Music Semiconductors, Inc.

Table 40: Tag Ports TP_DV and TP_SD Timing Data
Timing Data for LANCAM Interface
Switching Characteristics
Notes:
Rev. 0a
No.
No.
10
11
12
13
1
2
3
4
5
6
7
8
9
No.
50
51
52
53
RX_CLK
TP_DV
TP_SD
Symbol
tELEL
tELEH
tEHEL
tEHELC
tELQV
Symbol
tKHEL
tKHEH
tKHGX
tKHGV
tKHQV
tKHQX
tFIVKH
tMIVKH
tRCHTSH
tRCJTOH
tRCHTDL
tRCHTSL
Symbol
Parameter
Chip Enable Compare Cycle Time
Chip Enable LOW Pulse Width
Chip Enable HIGH Pulse Width
Chip Enable HIGH Pulse Width (Compare)
Chip Enable LOW to DQ Bus VALID (Read)
Parameter (all times in nanoseconds)
SYSCLK HIGH to Chip Enable LOW Delay Time
SYSCLK HIGH to Chip Enable HIGH Delay Time
SYSCLK HIGH to CAM Controls INVALID Delay Time
SYSCLK HIGH to CAM Controls VALID Delay Time
SYSCLK HIGH to DQ Bus VALID Delay Time
SYSCLK HIGH to DQ Bus INVALID Delay Time
Full Input VALID to SYSCLK HIGH Setup Time
MATCH Input VALID to SYSCLK HIGH Setup Time
Parameter (ns)
Delay RX_CLK HIGH to TP_DV HIGH
Delay RX_CLK HIGH to TP_SD HIGH
Delay RX_CLK HIGH to TP_DV LOW
Delay RX_CLK HIGH to TP_SD LOW
50
51
(MSB)
LANCAM Compare Cycle Time
BIT5
BIT4
Short Cycle
Medium Cycle
Long Cycle
27
BIT3
BIT2
7*SYSCLK
1*SYSCLK
2*SYSCLK
3*SYSCLK
1*SYSCLK
4*SYSCLK
3*SYSCLK
70 ns
Typ
BIT1
8*SYSCLK
2*SYSCLK
3*SYSCLK
4*SYSCLK
1*SYSCLK
4*SYSCLK
4*SYSCLK
Min
(LSB)
0
0
0
0
BIT0
90 ns
Min.
Typ
10
5
5
5
5
5
5
5
52
53
All
120 ns (90 ns)
8*SYSCLK
2*SYSCLK
4*SYSCLK
5*SYSCLK
1*SYSCLK
4*SYSCLK
5*SYSCLK
Max
20
20
20
20
Max.
Typ
19
19
19
19
19
19
Notes
Notes
Notes
1,2
1,3
1
1
4
4
5
6
1