ymf740c ETC-unknow, ymf740c Datasheet - Page 39

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ymf740c

Manufacturer Part Number
ymf740c
Description
Ds-1l
Manufacturer
ETC-unknow
Datasheet

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YMF740C
4. AC Characteristics
4-1. Master Clock
Note : Top = 0-70°C, PVDD=5.0±0.25 V, VDD5=5.0±0.25 V, VDD3=3.3±0.3 V, LVDD=3.3±0.3 V
4-2. Reset
Note : Top = 0-70°C, PVDD=5.0±0.25 V, VDD5=5.0±0.25 V, VDD3=3.3±0.3 V, LVDD=3.3±0.3 V, C
Reset Active Time after Power Stable
XI24 Cycle Time
XI24 High Time
XI24 Low Time
Power Stable to Reset Rising Edge
Reset Slew Rate
PVDD, VDD5
LVDD, VDD3
Item
(Fig.2)
Item
RST#
(Fig.1)
XI24
Fig.1: XI24 Master Clock timing
Symbol
t
t
t
XIHIGH
XILOW
XICYC
Fig.2: PCI Reset timing
Symbol
t
t
RSTOFF
XIHIGH
t
RST
-
Min.
-39-
16
16
4.75 V
3.0 V
-
t
XICYC
Min.
3.5 V
10
50
1
40.69
Typ.
t
XILOW
-
-
t
RSTOFF
Typ.
-
-
-
Max.
24
24
-
t
1.0 V
RST
2.5 V
Max.
-
-
-
Unit
ns
ns
ns
mV/ns
Unit
0.6 V
ms
ms
January 14, 1999
L
=50 pF

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