ymf740c ETC-unknow, ymf740c Datasheet - Page 20

• Manufacturer Part Number: ymf740c
• Description: Ds-1l
• Manufacturer: ETC-unknow

YMF740C
b5................PSN: Power Save PCI Audio block
b8................PR0: AC’97 Power down Control 0
b9................PR1: AC’97 Power down Control 1
b10..............PR2: AC’97 Power down Control 2
b11..............PR3: AC’97 Power down Control 3
b12..............PR4: AC’97 Power down Control 4
b13..............PR5: AC’97 Power down Control 5
b[15:14] ......AC’97 Power down Control 6 and 7
Setting this bit to “1” stops providing the clock with the PCI Audio function block. This block includes
PCI Audio, SRC, AC’97 I/F and H/W Vol.
This bit controls the power state of the ADC and Input Mux in AC’97.
This bit controls the power state of the DAC in AC’97.
This bit controls the power state of the Analog Mixer (Vref still on) in AC’97. This power state retains
the Reference Voltage of AC’97.
This bit controls the power state of the Analog Mixer (Vref off) in AC’97. This power state removes
Reference Voltage of AC’97.
This bit controls the power state of the AC-link in AC’97.
Setting this bit to “1” disables the internal clock of AC’97. In case AC’97 is used with DS-1L, the
master clock is supplied from DS-1L. Therefore, when the clock of AC’97 is stopped completely, set
both PR5 and PSN bits to “1”.
These bits control PR6 and PR7 status of the power control register in AC’97.
“0”: Normal
“1”: Power Save
“0”: Normal
“1”: Power down
“0”: Normal
“1”: Power down
“0”: Normal
“1”: Power down
“0”: Normal
“1”: Power down
“0”: Normal
“1”: Power down
“0”: Normal
“1”: Disable
(default)
(default)
(default)
(default)
(default)
(default)
(default)
-20-
January 14, 1999