l033c12v Advanced Micro Devices, l033c12v Datasheet - Page 10

• Manufacturer Part Number: l033c12v
• Description: 32 Megabit 4 M X 8-bit Cmos 3.0 Volt-only Uniform Sector Flash Memory - Advanced Micro Devices
• Manufacturer: Advanced Micro Devices

Notes:
1. When the ACC pin is at V
DEVICE BUS OPERATIONS
This section describes the requirements and use of
the device bus operations, which are initiated through
the internal command register. The command register
itself does not occupy any addressable memory loca-
tion. The register is composed of latches that store the
commands, along with the address and data informa-
tion needed to execute the command. The contents of
Legend:
L = Logic Low = V
2. The sector protect and sector unprotect functions may also be implemented via programming equipment. See the “Sector/Sector
Requirements for Reading Array Data
To read array data from the outputs, the system must
drive the CE# and OE# pins to V
control and selects the device. OE# is the output con-
trol and gates array data to the output pins. WE#
should remain at V
The internal state machine is set for reading array data
upon device power-up, or after a hardware reset. This
ensures that no spurious alteration of the memory
content occurs during the power transition. No com-
mand is necessary in this mode to obtain array data.
Standard microprocessor read cycles that assert valid
addresses on the device address inputs produce valid
data on the device data outputs. The device remains
enabled for read access until the command register
contents are altered.
See “Reading Array Data” for more information. Refer
to the AC Read Operations table for timing specifica-
Read
Write (Note 1)
Standby
Output Disable
Reset
Sector/Sector Block Protect
(Note 2)
Sector/Sector Block Unprotect
(Note 2)
Temporary Sector/Sector Block
Unprotect
more information.
Block Protection and Unprotection” section.
Operation
IL
, H = Logic High = V
IH
.
HH
, the device enters the accelerated program mode. See “Accelerated Program Operations” for
Table 1. Am29LV033C Device Bus Operations
IL
. CE# is the power
IH
, V
V
0.3 V
CE#
ID
CC
X
L
X
L
L
L
L
= 12.0 ± 0.5 V, X = Don’t Care, A
OE#
Am29LV033C
H
X
H
X
H
H
X
L
WE#
H
H
L
X
X
L
L
X
the register serve as inputs to the internal state ma-
chine. The state machine outputs dictate the function
of the device. Table 1 lists the device bus operations,
the inputs and control levels they require, and the re-
sulting output. The following subsections describe
each of these operations in further detail.
tions and to Figure 13 for the timing diagram. I
the DC Characteristics table represents the active cur-
rent specification for reading array data.
Writing Commands/Command Sequences
To write a command or command sequence (which in-
cludes programming data to the device and erasing
sectors of memory), the system must drive WE# and
CE# to V
The device features an Unlock Bypass mode to facili-
tate faster programming. Once the device enters the
Unlock Bypass mode, only two write cycles are re-
quired to program a byte, instead of four. The “Byte
Program Command Sequence” section has details on
programming data to the device using both standard
and Unlock Bypass command sequences.
An erase operation can erase one sector, multiple sec-
tors, or the entire device. Table 2 indicates the address
RESET#
V
0.3 V
V
V
V
CC
H
H
H
L
IL
ID
ID
ID
, and OE# to V
IN
= Address In, D
A6 = H, A1 = H, A0 = L
A6 = L, A1 = H, A0 = L
Sector Addresses,
Sector Addresses
Addresses
IH
A
A
A
.
X
X
X
IN
IN
IN
IN
= Data In, D
OUT
DQ0–DQ7
D
D
High-Z
High-Z
High-Z
IN
IN
= Data Out
D
D
, D
, D
D
OUT
IN
IN
OUT
OUT
CC1
in
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