m3819 Renesas Electronics Corporation., m3819 Datasheet - Page 45

• Manufacturer Part Number: m3819
• Description: Mitsubishi 8-bit Single-chip Microcomputer 740 Family / 38000 Series
• Manufacturer: Renesas Electronics Corporation.

A-D CONVERTER
The functional blocks of the A-D converter are described below.
A-D Conversion Register (AD) 002D
The A-D conversion register is a read-only register that stores the
result of an A-D conversion. This register should not be read dur-
ing A-D conversion.
AD/DA Control Register (ADCON) 002C
The AD/DA control register controls the A-D and the D-A conver-
sion process. Bits 0 to 3 of this register select analog input pins.
Bit 4 is the AD conversion completion bit. The value of this bit re-
mains at “0” during an A-D conversion, then changes to “1” when
the A-D conversion is completed.
The A-D conversion starts by writing “0” to this bit. Bit 6 controls
the output of D-A converter.
Comparison Voltage Generator
The comparison voltage generator divides the voltage between
AV
Channel Selector
The channel selector selects one of the input ports P7
AN
tor.
Comparator and Control Circuit
The comparator and control circuit compares an analog input volt-
age with the comparison voltage and stores the result in the A-D
conversion register. When an A-D conversion is completed, the
control circuit sets the AD conversion completion bit and the AD
conversion interrupt request bit to “1”.
Note that the comparator is constructed linked to a capacitor, so
set f(X
Note : When using the A-D conversion interrupt, set the INT
SS
0
, P5
and V
sion interrupt switch bit (the bit 5 of the interrupt selection register)
to “1”.
IN
7
) to 500 kHz or more during A-D conversion.
/S
RDY3
REF
by 256, and outputs the divided voltages.
/AN
15
–P5
0
/S
IN2
/AN
8
, and inputs to the compara-
16
4
7
/AD conver-
/AN
16
7
–P7
0
/
Fig. 23 Structure of A-D control register
b7
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER
MITSUBISHI MICROCOMPUTERS
b0
AD/DA control register
(ADCON : address 002C
Analog input pin selection bits
AD conversion completion bit
Not used (returns “0” when read)
DA output enable bit
Not used (returns “0” when read)
b3 b2 b1 b0
0 0 0 0 : P7
0 0 0 1 : P7
0 0 1 0 : P7
0 0 1 1 : P7
0 1 0 0 : P7
0 1 0 1 : P7
0 1 1 0 : P7
0 1 1 1 : P7
1 0 0 0 : P5
1 0 0 1 : P5
1 0 1 0 : P5
1 0 1 1 : P5
1 1 0 0 : P5
1 1 0 1 : P5
1 1 1 0 : P5
1 1 1 1 : P5
0 : Conversion in progress
1 : Conversion completed
0 : Disable
1 : Enable
3819 Group
0
1
2
3
4
5
6
7
0
1
2
3
4
5
6
7
/AN
/AN
/AN
/AN
/AN
/AN
/AN
/AN
/S
/S
/S
/S
/S
/S
/S
/S
IN2
OUT2
CLK2
RDY2
IN3
OUT3
CLK3
RDY3
0
1
2
3
4
5
6
7
/AN
/AN
16
/AN
/AN
/AN
/AN
/AN
/AN
)
8
12
10
14
9
11
13
15
31