m3819 Renesas Electronics Corporation., m3819 Datasheet - Page 25

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m3819

Manufacturer Part Number
m3819
Description
Mitsubishi 8-bit Single-chip Microcomputer 740 Family / 38000 Series
Manufacturer
Renesas Electronics Corporation.
Datasheet

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I/O PORTS
Direction Registers
The 3819 group has 54 programmable I/O pins arranged in 8 I/O
ports (ports P2
The I/O ports have direction registers which determine the input/
output direction of each individual pin. Each bit in a direction reg-
ister corresponds to one pin, each pin can be set to be input or
output.
When “0” is written to the bit corresponding to a pin, that pin be-
comes an input pin. When “1” is written to that bit, that pin
becomes an output pin.
If data is read from a pin which is set for output, the value of the
port latch is read, not the value of the pin itself. A pin which is set
for input the value of the pin itself is read because the pin is in
floating state. If a pin set for input is written to, only the port latch
is written to and the pin remains floating.
P0
DIG
P0
DIG
P1
DIG
P1
P2
P2
P2
P3
P3
P4
P4
ZCR
P4
P4
P4
P4
P4
0
7
6
0
7
0
7
0
3
4
0
5
2
4
1
7
/SEG
/SEG
/SEG
/DIG
/DIG
/DIG
–P2
/SEG
/SEG
/INT
/INT
/INT
/INT
/T1
/T3
0
7
8
Pin
OUT
OUT
7
0
1
2
4
15
16
19
/
32
39
40
24
31
,
/
/
/
4
–P2
7
, P4
Port P0
Port P1
Port P2
Port P3
Port P4
Name
1
–P4
4
, P4
6
Output
Output
Output
Input/output,
individual bits
Output
Input
Input/output,
individual bits
, P4
Input/Output
7
, P5–P8, PA, and PB).
CMOS compatible
input level
CMOS compatible
input level
CMOS 3-state output
High-breakdown-
voltage P-channel
open-drain output
with pull-down
resistor
High-breakdown-
voltage P-channel
open-drain output
with pull-down
resistor
High-breakdown-
voltage P-channel
open-drain output
with pull-down
resistor
TTL level input
CMOS 3-state output
High-breakdown-
voltage P-channel
open-drain output
with pull-down
resistor
I/O Format
High-Breakdown-Voltage Output Ports
The 3819 group microprocessors have 7 ports with high-break-
down-voltage pins (ports P0, P1, P2
high-breakdown-voltage ports have P-channel open-drain output
with V
Each pin in ports P0, P1, P2
pull-down resistor connected to V
ternal pull-down resistors, so that connect an external resistor to
each port. At reset, the P-channel output transistor of each port
latch is turned off, so it becomes V
resistor.
Writing “1” (weak drivability) to bit 7 of the FLDC mode register 1
(address 0036
tors for reducing transient noise. At reset, bit 7 of the FLDC mode
register 1 is set to “0” (strong drivability).
CC
–40 V of breakdown voltage.
FLD automatic dis-
play function
FLD automatic dis-
play function
FLD automatic dis-
play function
FLD automatic dis-
play function
External interrupt
input
Zero cross detec-
tion circuit input
(P4
Timer output
Non-Port Function
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER
5
)
16
) shows the rising transition of the output transis-
MITSUBISHI MICROCOMPUTERS
0
–P2
FLDC mode register 1
FLDC mode register 2
Port P0
segment/digit
switch register
FLDC mode register 1
FLDC mode register 2
FLDC mode register 1
FLDC mode register 2
Port P2 digit/port
switch register
FLDC mode register 1
FLDC mode register 2
Interrupt edge
selection register
Zero cross detection
control register
Timer 12 mode register
Timer 34 mode register
EE
3
Related SFR
EE
. Ports P8 and PA have no in-
, P3, and P9 has an internal
0
–P2
level (“L”) by the pull-down
3819 Group
3
, P3, P8, P9, PA). The
S
Diagram
No.
(1)
(1)
(2)
(3)
(4)
(5)
(6)
(7)
(4)
(8)
11

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