SI2414 SILABS [Silicon Laboratories], SI2414 Datasheet - Page 66

• Manufacturer Part Number: SI2414
• Manufacturer: SILABS [Silicon Laboratories]

Si2456/Si2433/Si2414
Parallel Interface 1 (0x01)
Reset settings = 0110_0011
66
Name RXF TXE REM INTM
Type
Bit
Bit
7
6
5
4
3
2
1
0
Name
D7
INTM
REM
ESC
RXF
TXE
RTS
CTS
R
INT
D6
R
Receive FIFO Almost Full (status).
0 = Receive FIFO (12 deep) contains three or more empty locations (RXF ≤ 9).
1 = Receive FIFO contains two or less empty locations (RXF ≥ 10). Requires servicing within
xx ms to avoid overflow.
Transmit FIFO Almost Empty (status).
0 = Transmit FIFO (14 deep) contains three or more characters (TXF ≥ 3).
1 = Transmit FIFO contains two or less characters (TXF ≤ 2). Requires servicing within xx ms
to avoid underflow.
Receive FIFO Empty.
0 = Receive FIFO has valid data.
1 = Receive FIFO empty.
Interrupt Mask.
0 = In parallel mode, the INT pin is triggered by a rising edge on RXF or TXE only (default).
1 = In parallel mode, the INT pin is triggered by a rising edge on RXF, TXE, or INT.
Interrupt.
0 = No interrupt has occurred.
1 = Indicates that an interrupt (CID, OCD, PPD, RI, or DCD from U70) has occurred. This bit
is cleared via the AT:I command.
Escape.
Operation of this bit in parallel mode is functionally equivalent to the ESC pin in serial mode.
Request-to-Send.
Operation of this bit in parallel mode is functionally equivalent to the RTS pin in serial mode.
Use of the CTS and RTS bits (as opposed to the TXE and RXF bits) allows the flow control
between the host and the ISOmodem to operate 1 byte at a time, rather than in blocks.
Clear-to-Send.
Operation of this bit in parallel mode is functionally equivalent to the CTS pin in serial mode.
Use of the CTS and RTS bits (as opposed to the TXE and RXF bits) allows the flow control
between the host and the ISOmodem to operate 1 byte at a time, rather than in blocks.
D5
R
R/W
D4
INT
D3
R
ESC RTS CTS
R/W
D2
R/W
D1
Rev. 0.9
D0
R
Function