ST72F63 STMICROELECTRONICS [STMicroelectronics], ST72F63 Datasheet - Page 48

• Manufacturer Part Number: ST72F63
• Manufacturer: STMICROELECTRONICS [STMicroelectronics]

ST7263B
16-BIT TIMER (Cont’d)
11.2.4 Low Power Modes
11.2.5 Interrupts
Note: The 16-bit Timer interrupt events are connected to the same interrupt vector (see Interrupts chap-
ter). These events generate an interrupt if the corresponding Enable Control Bit is set and the interrupt
mask in the CC register is reset (RIM instruction).
11.2.6 Summary of Timer modes
1) See note 4 in
2) See note 5 in
3) See note 4 in
48/132
WAIT
HALT
Input Capture 1 event/Counter reset in PWM mode
Input Capture 2 event
Output Compare 1 event (not available in PWM mode)
Output Compare 2 event (not available in PWM mode)
Timer Overflow event
Input Capture (1 and/or 2)
Output Compare (1 and/or 2)
One Pulse Mode
PWM Mode
Mode
MODES
No effect on 16-bit Timer.
Timer interrupts cause the device to exit from WAIT mode.
16-bit Timer registers are frozen.
In HALT mode, the counter stops counting until Halt mode is exited. Counting resumes from the previous
count when the MCU is woken up by an interrupt with “exit from HALT mode” capability or from the counter
reset value when the MCU is woken up by a RESET.
If an input capture event occurs on the ICAP i pin, the input capture detection circuitry is armed. Consequent-
ly, when the MCU is woken up by an interrupt with “exit from HALT mode” capability, the ICF i bit is set, and
the counter value present when exiting from HALT mode is captured into the IC i R register.
Section 11.2.3.5, "One Pulse Mode"
Section 11.2.3.5, "One Pulse Mode"
Section 11.2.3.6, "Pulse Width Modulation Mode"
Interrupt Event
Input Capture 1
Yes
Yes
No
No
Not Recommended
Not Recommended
Input Capture 2
Description
Yes
Yes
TIMER RESOURCES
1)
3)
Output Compare 1 Output Compare 2
Event
OCF1
OCF2
ICF1
ICF2
Flag
TOF
Yes
Yes
No
No
Control
Enable
OCIE
TOIE
ICIE
Bit
from
Wait
Exit
Yes
Yes
Yes
Yes
Yes
Partially
Yes
Yes
No
from
Halt
Exit
No
No
No
No
No
2)