ST72F63 STMICROELECTRONICS [STMicroelectronics], ST72F63 Datasheet - Page 32

• Manufacturer Part Number: ST72F63
• Manufacturer: STMICROELECTRONICS [STMicroelectronics]

ST7263B
10 MISCELLANEOUS REGISTER
Address: 0009h — Read/Write
Reset Value: 0000 0000 (00h)
Bit 7:3 = Reserved
Bit 2 = SMS Slow Mode Select .
This bit is set by software and only cleared by hard-
ware after a reset. If this bit is set, it enables the use
of an internal divide-by-2 clock divider (refer to
ure 15 on page
the USB frequency.
0: Divide-by-2 disabled and CPU clock frequency
1: Divide-by-2 enabled and CPU clock frequency is
32/132
7
is standard
halved.
-
-
-
19). The SMS bit has no effect on
-
-
SMS
USBOE
MCO
0
Fig-
Bit 1 = USBOE USB enable.
If this bit is set, the port PC2 outputs the USB out-
put enable signal (at “1” when the ST7 USB is
transmitting data).
Unused bits 7-4 are set.
Bit 0 = MCO Main Clock Out selection
This bit enables the MCO alternate function on the
PA0 I/O port. It is set and cleared by software.
0: MCO alternate function disabled (I/O pin free for
1: MCO alternate function enabled (f
general-purpose I/O)
port)
CPU
on I/O