ST72F321 STMICROELECTRONICS [STMicroelectronics], ST72F321 Datasheet - Page 151

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ST72F321

Manufacturer Part Number
ST72F321
Description
64/44-PIN 8-BIT MCU WITH 32 TO 60K FLASH/ROM, ADC, FIVE TIMERS, SPI, SCI, I2C INTERFACE
Manufacturer
STMICROELECTRONICS [STMicroelectronics]
Datasheet

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CLOCK CHARACTERISTICS (Cont’d)
12.5.5 Clock Security System (CSS)
Note:
1. Data based on characterization results.
12.5.6 PLL Characteristics
Note:
1. Data characterized but not tested.
The user must take the PLL jitter into account in the application (for example in serial communication or
sampling of high frequency signals). The PLL jitter is a periodic effect, which is integrated over several
CPU cycles. Therefore the longer the period of the application signal, the less it will be impacted by the
PLL jitter.
Figure 80
cies of less than 125KHz, the jitter is negligible.
Figure 80. Integrated PLL Jitter vs signal frequency
Note 1: Measurement conditions: f
+/-Jitter (%)
f
f
∆ f
SFOSC
OSC
Symbol
Symbol
CPU
0.8
0.7
0.6
0.5
0.4
0.3
0.2
0.1
/ f
0
CPU
shows the PLL jitter integrated on application signals in the range 125kHz to 2MHz. At frequen-
Safe Oscillator Frequency
4 MHz
PLL input frequency range
Instantaneous PLL jitter
2 MHz
Parameter
Parameter
Application Frequency
1 MHz
CPU
1)
1)
500 kHz
= 8MHz.
f
f
OSC
OSC
= 4 MHz.
= 2 MHz.
250 kHz
Conditions
Conditions
1
Min
Min
2
Typ
Typ
1.0
2.5
3
Max
Max
2.5
4.0
4
ST72321
151/189
MHz
Unit
MHz
Unit
%

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