ST24FC21 STMICROELECTRONICS [STMicroelectronics], ST24FC21 Datasheet
ST24FC21
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ST24FC21 Summary of contents
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... ST24FW21) VESA 2 COMPATIBLE DESCRIPTION The ST24LC21B, ST24LW21, ST24FC21, ST24FC21B and ST24FW21 are 1K bit electrically erasable programmable memory (EEPROM), or- ganized in 128x8 bits. In the text, products are referred as ST24xy21, where "x" is either "L" for VESA 1 or "F" for VESA 2 compatible memories and where " ...
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... ST24LC21B, ST24LW21, ST24FC21, ST24FC21B, ST24FW21 Figure 2A. DIP Pin Connections ST24LC21B AI01742 Warning Not Connected. Figure 2C. DIP Pin Connections ST24FC21 ST24FC21B AI01744 Warning Not Connected Don’t Use, must be left open or connected to V ...
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... Operating sections of this specification is not i m plied. Exposure to Absolute Maximum Rating conditions for extended periods may affect device reliability. Refer also to the STMicroelectronics SURE Program and other relevant quality documents. 2. MIL-STD-883C, 3015.7 (100pF, 1500 3. EIAJ IC-121 (Condition C) (200pF Table 3A. Device Select Code (ST24LC21B, ST24LW21, ST24FC21 and ST24FW21) Bit b7 Device Select 1 Note: The MSB b7 is sent first ...
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... ST24LC21B, ST24LW21, ST24FC21, ST24FC21B, ST24FW21 Figure 3. Transmit Only Mode Waveforms V CC SCL SDA tVPU VCLK SCL SDA Bit 6 VCLK 2 Table Operating Modes ST24LC21B RW ST24FC21 Mode bit ST24FC21B Current Address ’1’ Read ’0’ Random Address Read ’1’ ...
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... The ST24xy21 can be switched from Transmit Only 2 mode Bidirectional mode by applying a valid high to low transition on the SCL pin (see Figure 4). – When the ST24LC21B (or the ST24FC21 or 2 the ST24FC21B the I mode, the VCLK input (pin 7) enables (or inhib- its) the execution of any write instruction: if VCLK = 1, write instructions are executed ...
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... ST24LC21B, ST24LW21, ST24FC21, ST24FC21B, ST24FW21 Figure 5. Error Recovery Mechanism Flowchart for the ST24FC21, ST24FC21B and ST24FW21 products Internal Address Pointer = 0 NO VCLK Internal Counter = 0 Start Internal 2 sec Timer (START + Device Select) Transition State (VESA 2) Increment VCLK Counter NO Transmit-Only Mode 6/22 Memory Power On ...
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... Value versus Bus Capacitance ( When the ST24FC21 (or the ST24FC21B or the ST24FW21) first switches to the I DDC2B mode), it enters a transition state which is 2 functionally identical operation. But, if the ST24FC21 (or the ST24FC21B or the ST24FW21) 2 does not receive a valid I C sequence, that is a ...
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... Symbol C Input Capacitance (SDA Input Capacitance (other pins) IN Low-pass filter input time constant t LP (SDA and SCL) Note: 1. Sampled only, not 100% tested. Table 6A. DC Characteristics (ST24LC21B, ST24LW21, ST24FC21 and ST24FW21 – 3.6V to 5.5V Symbol Parameter I Input Leakage Current LI I ...
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... IH (SCL, SDA, WC) High Level Threshold Voltage V P (Schmitt Trigger on VLCK) Low Level Threshold Voltage V N (Schmitt Trigger on VLCK) V Output Low Voltage OL Note 1: Preliminary results. ST24LC21B, ST24LW21, ST24FC21, ST24FC21B, ST24FW21 Test Condition OUT SDA 400kHz CC C (Rise/Fall time < 10ns ...
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... The ST24LC21B, ST24LW21, ST24FC21 and ST24FW21 are not executing a STOP condition if this STOP condition happens at any time inside a byte. The ST24FC21B executes a STOP condition when this STOP condition happens at any time inside a byte. Acknowledge Bit (ACK). An acknowledge signal is used to indicate a successfull data transfer. The bus transmitter, either master or slave, will release the SDA bus after sending 8 bits of data ...
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... VH1VH2 R ( VCLK Fall Time VL1VL2 F (2) t Recovery Time RECOVERY Notes: 1. Refer to Figure 3. 2. Sampled only, not 100% tested. ST24LC21B, ST24LW21, ST24FC21, ST24FC21B, ST24FW21 2 C Bidirectional Mode for Clock Frequency = 100kHz Parameter Parameter Min Max Unit 1 s 300 300 ns 4 ...
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... ST24LC21B, ST24LW21, ST24FC21, ST24FC21B, ST24FW21 Figure 7. AC Waveforms SCL SDA IN START CONDITION SCL tCLQV SDA OUT tDHDL SCL SDA IN tCHDH STOP CONDITION VCLK SDA SCL 12/22 tCHCL tDLCL tCHDX tCLDX SDA SDA INPUT CHANGE tCLQX DATA VALID DATA OUTPUT tW WRITE CYCLE tVCHVCL ...
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... Input and Output Timing Ref. Voltages 2 Figure Bus Protocol SCL SDA START CONDITION SCL MSB SDA START CONDITION 1 SCL MSB SDA ST24LC21B, ST24LW21, ST24FC21, ST24FC21B, ST24FW21 Figure 8. AC Testing Input Output Waveforms 50ns 0.8V CC 0. 0.4V to 2.4V 0.2V CC 0. SDA SDA INPUT CHANGE ...
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... C bidirectional mode, any write command with 2 C bus VCLK=0 (for the ST24LC21B and ST24FC21, ST24FC21B) or with WC=0 (for the ST24LW21 and ST24FW21) will not modify data and will be ac- knowledged on data bytes, as shown in Figure 12. Byte Write. In the Byte Write mode the master ...
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... The transfer is terminated by the master generating a STOP condition. Care must be taken to avoid address counter ’roll-over’ which could result in data being overwritten. Note that, for any write mode, the generation by the master of the ST24LC21B, ST24LW21, ST24FC21, ST24FC21B, ST24FW21 ACK DEV SEL BYTE ADDR R/W ...
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... ST24LC21B, ST24LW21, ST24FC21, ST24FC21B, ST24FW21 Figure 12. Inhibited Write when VCLK/ VCLK/WC CONTROL BYTE WRITE CONTROL PAGE WRITE – Step 1: the Master issues a START condition followed by a Device Select byte (1st byte of the new instruction). – Step 2: if the memory is busy with the internal write cycle, no ACK will be returned and the master goes back to Step 1 ...
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... VOLTAGE IN THE VESA 2.0 SPECIFICATION According to the VESA 2.0 specification, the ST24xy21 can be supplied by either the MONITOR or by the HOST (using +5V on the VGA cable pin 9) power supply. The easyest way to implement this is to use 2 diodes as described in the following ST24LC21B, ST24LW21, ST24FC21, ST24FC21B, ST24FW21 9 47k ...
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... ST24LC21B, ST24LW21, ST24FC21, ST24FC21B, ST24FW21 Figure 14. Read Modes Sequence CURRENT ADDRESS READ RANDOM ADDRESS READ SEQUENTIAL CURRENT READ SEQUENTIAL RANDOM READ Note: * The 7 Most Significant bits of DEV SEL bytes of a Random Read (1st byte and 3rd byte) must be identical. 18/22 ACK NO ACK ...
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... Devices are shipped from the factory with the memory content set at all "1’s" (FFh). For a list of available options (Package, etc...) or for further information on any aspect of this device, please contact the STMicroelectronics Sales Office nearest to you. ST24LC21B, ST24LW21, ST24FC21, ST24FC21B, ST24FW21 ST24LC21B M ...
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... ST24LC21B, ST24LW21, ST24FC21, ST24FC21B, ST24FW21 PSDIP8 - 8 pin Plastic Skinny DIP, 0.25mm lead frame Symb Typ 7. 2. PSDIP8 Drawing is not to scale. 20/22 mm Min Max 3.90 5.90 0.49 – 3.30 5.30 0.36 0.56 1.15 1.65 0.20 0.36 9.20 9.90 – – 6.00 6.70 – – 7.80 – 10.00 3.00 3. inches ...
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... SO8 - 8 lead Plastic Small Outline, 150 mils body width Symb Typ 1. SO8 SO-a Drawing is not to scale. ST24LC21B, ST24LW21, ST24FC21, ST24FC21B, ST24FW21 mm Min Max 1.35 1.75 0.10 0.25 0.33 0.51 0.19 0.25 4.80 5.00 3.80 4.00 – – 5.80 6.20 0.25 0.50 0. inches Typ Min 0.053 0.069 0.004 ...
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... ST24LC21B, ST24LW21, ST24FC21, ST24FC21B, ST24FW21 Information furnished is believed to be accurate and reliable. However, STMicroelectroni cs assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject to change without notice ...