ST10F271E STMICROELECTRONICS [STMicroelectronics], ST10F271E Datasheet - Page 19
ST10F271E
Manufacturer Part Number
ST10F271E
Description
16-bit MCU with 128 Kbyte Flash memory and 8/12 Kbyte RAM
Manufacturer
STMICROELECTRONICS [STMicroelectronics]
Datasheet
1.ST10F271E.pdf
(180 pages)
- Current page: 19 of 180
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ST10F271B/ST10F271E
Table 1.
P1L.0 - P1L.7
RSTOUT
Symbol
P1H.0 -
XTAL1
XTAL2
XTAL3
XTAL4
RSTIN
V
V
P1H.7
NMI
AGND
AREF
Pin description (continued)
118-125
128-135
132
133
134
135
138
137
143
144
140
141
142
Pin
37
38
Type
I/O
O
O
O
-
-
I
I
I
I
I
I
I
I
Two 8-bit bidirectional I/O ports P1L and P1H, bit-wise programmable for input or
output via direction bit. Programming an I/O pin as input forces the corresponding
output driver to high impedance state. PORT1 is used as the 16-bit address bus
(A) in demultiplexed bus modes: if at least BUSCONx is configured such the
demultiplexed mode is selected, the pis of PORT1 are not available for general
purpose I/O function. The input threshold of Port 1 is selectable (TTL or CMOS).
Only for the ST10F271E
– The pins of P1L also serve as the additional (up to 8) analog input channels for
The following PORT1 pins have alternate functions:
P1H.4
P1H.5
P1H.6
P1H.7
XTAL1 Main oscillator amplifier circuit and/or external clock input.
XTAL2 Main oscillator amplifier circuit output.
To clock the device from an external source, drive XTAL1 while leaving XTAL2
unconnected. Minimum and maximum high / low and rise / fall times specified in
the AC Characteristics must be observed.
XTAL3 32 kHz oscillator amplifier circuit input
XTAL4 32 kHz oscillator amplifier circuit output
When 32 kHz oscillator amplifier is not used, to avoid spurious consumption,
XTAL3 shall be tied to ground while XTAL4 shall be left open. Besides, bit OFF32
in RTCCON register shall be set. 32 kHz oscillator can only be driven by an
external crystal, and not by a different clock source.
Reset Input with CMOS Schmitt-Trigger characteristics. A low level at this pin for
a specified duration while the oscillator is running resets the ST10F271. An
internal pull-up resistor permits power-on reset using only a capacitor connected
to V
register), the RSTIN line is pulled low for the duration of the internal reset
sequence.
Internal Reset Indication Output. This pin is driven to a low level during hardware,
software or watchdog timer reset.
initialization) instruction is executed.
Non-Maskable Interrupt Input. A high to low transition at this pin causes the CPU
to vector to the NMI trap routine. If bit PWDCFG = ‘0’ in SYSCON register, when
the PWRDN (power down) instruction is executed, the NMI pin must be low in
order to force the ST10F271 to go into power down mode. If NMI is high and
PWDCFG =’0’, when PWRDN is executed, the part will continue to run in normal
mode.
If not used, pin NMI should be pulled high externally.
A/D converter reference voltage and analog supply
A/D converter reference and analog ground
the A/D converter, where P1L.x equals ANy (Analog input channel y,
where y = x + 16). This additional function have higher priority on demultiplexed
bus function.
SS
. In bidirectional reset mode (enabled by setting bit BDRSTEN in SYSCON
CC24IO
CC25IO
CC26IO
CC27IO
CAPCOM2: CC24 capture input
CAPCOM2: CC25 capture input
CAPCOM2: CC26 capture input
CAPCOM2: CC27 capture input
RSTOUT
Function
remains low until the EINIT (end of
Pin data
19/180
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