ade3000 STMicroelectronics, ade3000 Datasheet - Page 18

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ade3000

Manufacturer Part Number
ade3000
Description
Lcd Display Engines With Integrated Dvi, Adc And Yuv Ports
Manufacturer
STMicroelectronics
Datasheet

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0
ADC Block
18/88
2.3
FM_FS_CTRL
FM_FS_PR_0
FM_FS_PR_1
FM_FS_PR_2
FM_FS_PR_3
FM_FS_AMPLITUDE
FM_FS_PERIODX64
ADC_DITHER
ADC_OFFSET_R
ADC_OFFSET_G
ADC_OFFSET_B
ADC_GAIN_R
ADC_GAIN_G
ADC_GAIN_B
Register Name
where f
The maximum output frequency of the fm frequency synthesizer is f
Note that native duty cycle of the fm frequency synthesizer is not 50/50. We recommend to either
enable the divide-by-two in the fm synthesizer block for frequencies up to f
108 MHz) or set the output mux to a double wide output mode for pixel clocks above f
2
ADC Block
The analog port consists of three 9-bit RGB ADCs with preamp, gain/offset adjustment and digital
filtering. The I2C interface for the ADC block is in the INCLK clock domain which must be active for
programming.
Input voltage, gain and offset register settings are approximately related to the output code. In this
equation, the output code (OUTPUT_CODE_8B) is equal to:
(1+NDIV)
Register
457 x offset / 2
OUT
. This will ensure a 50% duty clock on the output.
and f
XCLK
8
+ 181 x gain x input_mV / 2
are in MHz.
Table 5: FM Frequency Synthesizer Registers
0x0830
0x0831
0x0832
0x0833
0x0834
0x0835
0x0836
Addr
0x032C
0x032A
0x032B
0x0324
0x0326
0x0328
0x0329
Addr.
Mode
Table 6: ADC Registers
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Mode
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Bits
[7:4]
[7:0]
[7:0]
[7:0]
[7:0]
[7:0]
[7:0]
[3]
[2]
[1]
[0]
Bits
[1:0]
[7:0]
[7:0]
[7:0]
[7:0]
[7:0]
[7:0]
[7]
[6]
[5]
[4]
[3]
[2]
16
0x8000000 Phase Rate
- 125 x gain x offset / 2
Default
Default
0x80
0x0
0x0
0x0
0x0
0x0
0x0
0x0
0x0
0x0
0x0
0x0
0x0
0x0
0x0
0x0
0x0
Reserved
Clear the FM synthesizer
Clear the FS accumulator
Activate the frequency modulation
Divide the output by 2
LSB = 72 ps
LSB = 1.185 µs
Reserved
Dither Horizontally
Dither Vertically
Dither Temporally
Force Dither High
Enable Dither
Reserved
Offset Control, Red Channel
Offset Control, Green Channel
Offset Control, Blue Channel
Gain Control, Red Channel
Gain Control, Green Channel
Gain Control, Blue Channel
XTAL
x 2
XCLK
16
Description
Description
(2+NDIV)
- 219
x 2
(1+NDIV)
.
XCLK
ADE3XXX
(typically
x

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