SM59264IHHK SYNCMOS [SyncMOS Technologies,Inc], SM59264IHHK Datasheet - Page 12

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SM59264IHHK

Manufacturer Part Number
SM59264IHHK
Description
8 - Bit Micro-controller with 128KB flash & 1KB RAM embedded
Manufacturer
SYNCMOS [SyncMOS Technologies,Inc]
Datasheet
Specifications subject to change without notice,contact your sales representatives for the most recent information.
2. Port 4 for PLCC or QFP package:
The bit addressable port 4 is available with PLCC or QFP package. The port 4 has only 4 pins and its port address is
located at 0D8H. The function of port 4 is the same as the function of port 1, port 2 and port 3.
Port4 (P4, $D8)
3. In-System Programming (ISP) Function
The SM59264 can generate flash control signal by internal hardware circuit. User utilize flash control register, flash address
register and flash data register to perform the in-system programming (ISP) function without removing the SM59264 from
the system.
The SM59264 provides internal flash control signal which can do flash program/chip erase/page erase/protect functions.
User need to design and use any kind of interface which SM59264 can input data. User then utilize ISP service program to
perform the flash program/chip erase/page erase/protect functions.
3.1 ISP Service Program
The ISP service program is a user developed firmware program which resides in the ISP service program space. After user
developed the ISP service program, user then determine the size of the ISP service program. User need to program the
ISP service program in the SM59264 for the ISP purpose.
The ISP service program were developed by user so that it should includes any features which relates to the flash memory
programming function as well as communication protocol between SM59264 and host device which output data to the
SM59264. For example, if user utilize UART interface to receive/transmit data between SM59264 and host device, the ISP
service program should include baud rate, checksum or parity check or any error-checking mechanism to avoid data trans-
mission error.
The ISP service program can be initiated under SM59264 active or idle mode. It can not be initiated under power down
mode.
3.2 Lock Bit (N)
The Lock Bit N has two functions: one is for service program size configuration and the other is to lock the ISP service pro-
gram space from flash erase function.
The ISP service program space address range from $F000 to $FFFF. It can be divided as blocks of N*512 byte. (N=0 to 8).
When N=0 means no ISP function, all of 64K byte flash memory can be used as program memory. When N=1 means ISP
service program occupies 512 byte while the rest of 63.5K byte flash memory can be used as program memory. The maxi-
mum ISP service program allowed is 4K byte for N=8. Under such configuration, the usable program memory space is 60K
byte.
The bit 3, bit 2, bit 1, bit 0 output the setting to pin P4.3, P4.2, P4.1, P4.0 respectively.
Read:
Write:
Reset value:
SyncMOS Technologies Inc.
May 2002
Unused
bit-7
*
Unused
*
Unused
*
Unused
12/32
*
P4.3
1
P4.2
1
P4.1
1
Ver 1.0 PID 59264 05/02
P4.0
SM59264
bit-0
1

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