SM59264IHHK SYNCMOS [SyncMOS Technologies,Inc], SM59264IHHK Datasheet - Page 11

• Manufacturer Part Number: SM59264IHHK
• Description: 8 - Bit Micro-controller with 128KB flash & 1KB RAM embedded
• Manufacturer: SYNCMOS [SyncMOS Technologies,Inc]

Specifications subject to change without notice,contact your sales representatives for the most recent information.
One page of data RAM is 256 bytes.
The port 0, port2, port3.6 and port3.7 can be used as general purpose I/O pin while port0 is open-drain structure.
System Control Register (SCONF, $BF)
1.5 I/O Pin Configuration
The ports 1, 2 and 3 of standard 8051 have internal pull-up resistor, and port 0 has open-drain outputs. Each I/O pin can
be used independently as an input or an output. For I/O ports to be used as an input pin, the port bit latch must contain a
‘1’ which turns off the output driver FET. Then for port 1, 2 and 3 port pin is pulled high by a weak internal pull-up, and can
be pulled low by an external source. The port 0 has open-drain outputs which means its pull-ups are not active during nor-
mal port operation. Writing ‘1’ to the port 0 bit latch will causing bit floating so that it can be used as a high-impedance
input.
The port 4 used as GPIO will has the same function as port 1, 2 and 3.
output
data
input
data
Read:
Write:
Reset value:
ALEI: ALE output inhibit bit, to reduce EMI, Setting bit 0 (ALEI) of SCONF can inhibit the clock signal in Fosc/6Hz
WDR: Watch Dog Timer Reset. When system reset by Watch Dog Timer overflow, WDR will be set to 1, The bit
DFEN: 64K Data Flash enable bit. The default setting of DFEN bit is 0 (disable).
ISPE: ISP enable bit
OME: 768 bytes on-chip RAM enable bit, The bit 1 (OME) of SCONF can enable or disable the on-chip expanded
SyncMOS Technologies Inc.
May 2002
output to the ALE pin.
768 byte RAM. The default setting of OME bit is 0 (disable).
7 (WDR) of SCONF is Watch Dog Timer Reset bit. It will be set to 1 when reset signal generated by WDT
overflow. User should check WDR bit whenever un-predicted reset happened.
pin
WDR
bit-7
0
port 0
standard 8051
Unused
*
Unused
*
Unused
11/32
*
output
data
input
data
DFEN
0
pin
ISPE
0
port 1, 2 and 3
standard 8051
OME
0
Ver 1.0 PID 59264 05/02
SM59264
ALEI
bit-0
0