gc41c501g0-sp8i CORERIVER Semiconductor, gc41c501g0-sp8i Datasheet - Page 60

• Manufacturer Part Number: gc41c501g0-sp8i
• Description: 4-bit Microcontrollers With Reduced 8051 Architecture With Reduced 8051 Architecture
• Manufacturer: CORERIVER Semiconductor

SETB bit
SUB A, @DP
Appendix A : Instruction Set (19/19)
Binary Code
Binary Code
Description
Description
Carry Flag
Carry Flag
Operation
Operation
Example
Example
Cycles
Cycles
Bytes
Bytes
Sets a bit in data memory indirectly addressed
by DPTR. The bit position is obtained at the
least significant two bits of opcode.
M[DP].bit ← 1
Not affected.
1
1
; Assumes M[DP] contains 5.
SETB 2
CJNE @DP, #7, ERROR
Subtracts the contents of indirect data memory
from the Accumulator. The result is stored in
Accumulator. The carry flag is cleared if the
unsigned value of ACC is less than unsigned
value of M[DP]; otherwise, C is set.
(A) ← (A) - M[DP]
If (A) < M[DP] THEN (C) ← 0
1
1
SUB A, @DP
1000
0000
11bb
1011
ELSE (C) ← 1.
; Check result
; M[DP].2 ← 1
XCH A, @DP
XRL A, @DP
Binary Code
Binary Code
Description
Description
Carry Flag
Carry Flag
Operation
Operation
Example
Example
Cycles
Cycles
Bytes
Bytes
Exchanges the contents of ACC and that of
data memory addressed by DPTR.
(A)
Not affected.
1
1
XCH A, @DP
XRL performs the bitwise logical Exclusive-OR
operation between the indirect data memory
and ACC. The result is stored in Accumulator.
(A) ← (A) ^ M[DP]
Not affected.
1
1
; Assumes M[DP] contains 2
MOV A, #0xA ; Set ACC as 10.
XRL A, @DP
1000
0000
↔
M[DP]
ATOM1.0 Family
0001
1110
; The result, 8 is stored in ACC.
Preliminary
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