SS8037 SSC [Silicon Standard Corp.], SS8037 Datasheet - Page 7

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SS8037

Manufacturer Part Number
SS8037
Description
Microprocessor Reset IC
Manufacturer
SSC [Silicon Standard Corp.]
Datasheet

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10/6/2004 Rev.2.20
PIN DESCRIPTION
APPLICATIONS INFORMATION
A microprocessor’s (µP’s) reset input starts the µP in a
known state. The SS8037L/H and 8038L assert reset
to prevent code-execution errors during power-up,
power-down, or brownout conditions. They assert a reset
signal whenever the V
preset threshold, keeping it asserted for at least 140ms
after V
SS8038L
SS8037L/37H have push-pull output stages. Connect a
pull-up resistor on the SS8308L’s RESET output to any
supply between 0 and 5.5V.
Figure 1. Maximum Transient Duration Without
Fig 2.
PIN
1
2
3
600
500
400
300
200
100
0
CC
1
RESET
803xx308/293/263
Causing a Reset Pulse vs. Reset Compara-
tor Overdrive
(SS8037L/38L)
(SS8037H)
has risen above the reset threshold. The
uses
NAME
RESET
GND
V
Reset Comparator Overdrive, V
Valid to V
CC
an
SS8037
CC
10
803xx 463/438/400
open-drain
supply voltage declines below a
V
V
GND
GND
CC
CC
CC
Ground
rises above the reset threshold.
RESET Output remains high while V
rises above the reset threshold.
Supply Voltage (+5V, +3.3V, +3.0V)
RESET
RESET
RESET
= Ground Circuit
Output remains low while V
TH
100
output,
- V
www.SiliconStandard.com
CC
R1
R1
100k
100k
(mV)
and
1000
the
CC
CC
is below the reset threshold, and for at least 140ms after V
is below the reset threshold, and for at least 140ms after V
Negative-Going V
In addition to issuing a reset to the µP during power-up,
power-down,
SS8037L/H/8038L are relatively immune to short-
duration negative-going V
Figure 1 shows typical transient duration vs. reset com-
parator overdrive, for which the SS8037L/H/8038L
do not generate a reset pulse. The graph was generated
using a negative-going pulse applied to V
above the actual reset threshold and ending below it by
the magnitude indicated (reset comparator overdrive).
The graph indicates the maximum pulse width a nega-
tive-going V
pulse. As the magnitude of the transient increases (goes
farther below the reset threshold), the maximum allow-
able pulse width decreases. Typically, for the SS803xx
463 and SS803xx438, a V
100mV below the reset threshold and lasts 7µs or less
will not cause a reset pulse. A 0.1µF bypass capacitor
mounted as close as possible to the V
additional transient immunity.
Ensuring a Valid Reset Output Down to V
When V
no longer sinks current—it becomes an open circuit.
Therefore, high-impedance CMOS logic inputs con-
nected to RESET can drift to undetermined voltages.
This presents no problem in most applications since most
µP and other circuitry is inoperative with
However, in applications where RESET must be valid
down to 0V, adding a pull-down resistor to RESET
causes any stray leakage currents to flow to ground,
holding RESET low (Figure 2). R1’s value is not critical;
100k
enough to pull RESET to ground.
A 100k pull-up resistor to
the SS8038L if RESET is required to remain valid for
V
CC
FUNCTION
< 1V.
is large enough not to load RESET and small
CC
falls below 1V, the SS8037 RESET output
CC
transient can have without causing a reset
and
CC
Transients
brownout
CC
VCC
transients (glitches).
CC
is also recommended for
transient that goes
SS8037/8(G)
conditions,
CC
CC
VCC
, starting 0.5V
CC
pin provides
below 1V.
= 0
CC
CC
7 of 9
the

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