SS8018TR SSC [Silicon Standard Corp.], SS8018TR Datasheet - Page 12

• Manufacturer Part Number: SS8018TR
• Manufacturer: SSC [Silicon Standard Corp.]

Rev.2.01 6/06/2003
POR AND UVLO
The SS8018 has a volatile memory. To prevent ambigu-
ous power-supply conditions from corrupting the data in
memory and causing erratic behavior, a POR voltage de-
tector monitors VCC and clears the memory if VCC falls
below 1.7V (typical, see Electrical Characteristics table).
When power is first applied and VCC rises above 1.7V
(typical), the logic blocks begin operating, although reads
and writes at V
A second VCC comparator, the ADC UVLO comparator,
prevents the ADC from converting until there is sufficient
headroom (VCC= 2.8V typical).
To suppress unwanted
bedded a fault queue function. The
until consecutive out of limit measurements have
reached the queue number. The mapping of fault queue
register (ALERTFQ, 22h) value to fault queue number is
shown in the Table 9.
Table 9. Alert Fault Queue
ALERT Fault Queue
ALERTFQ
XXXX000X
XXXX001X
XXXX010X
XXXX011X
XXXX100X
XXXX101X
XXXX110X
XXXX111X
VALUE
CC
levels below 3V are not recommended.
FAULT QUEUE NUMBER
ALERT
triggering the G781 em-
1
2
3
3
4
4
4
4
ALERT
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won’t assert
Operation of The THERM Function
A local and remote
the SS8018 to set the temperature limit above which the
be set to 1 corresponding to remote and local over tem-
perature. These two bits won’t be cleared to 0 by read-
ing status byte it the over temperature condition remain.
A hysteresis value is provided by writing the register 21h
to set the temperature threshold to release the
the value of register 19h, 20h minus the value in register
21h. The format of register 21h is 2’s complement. The
sistor to power supply.
THERM
THERM
THERM
pin asserts low and the bit 1, of status byte will
pin alarm state, The releasing temperature is
signal is open drain and requires a pull-up re-
THERM
limit can be programmed into
SS8018
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