lc7073m Sanyo Semiconductor Corporation, lc7073m Datasheet - Page 8

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lc7073m

Manufacturer Part Number
lc7073m
Description
Error Detection And Correction Ics For Rds Demodulators
Manufacturer
Sanyo Semiconductor Corporation
Datasheet
A minimum delay of 10 ms should be allowed for oscillator stabilization. A 10 to 100 ms reset delay is generated using
a 0.1 F reset capacitor, C. A larger capacitor should be used if the supply rise time is longer.
Device Comparison
The LC7070N, LC7070M and LC7071NM have identical basic functions, pinouts and input/output timing to those of the
LC7073 and LC7073M. Their respective packages and output circuitry are compared in table 3.
Table 3. Device comparison
The differences in output data format between the LC7070N/LC7070NM/LC7071NM and LC7073/LC7073M are as
follows.
Offset Words E and F
The LC7070N/LC7070NM/LC7071NM recognizes offset words E and F and performs group sync detection. The LC7073/
LC7073M does not recognize offset words E and F–it only detects A, B, C, C’ and D.
Input Data Bits
If all data bits are 0, the LC7070N/LC7070NM/LC7071NM only recognizes offset word E. The LC7073/LC7073M does
not recognize the offset word E block. No sync detection occurs if all input data bits are 0. Once data cutoff has been
determined, output data stops and the sync cutoff sequence begins.
L
L
L
L
C
C
L
C
D
C
7
7
C
7
e
7
0
0
7
0
v
0
7
7
0
c i
7
7
0
1
7
0
3
e
N
N
3
N
M
M
M
1
1
1
1
1
8
8
8
P
8
8
Figure 9. Supply rise time vs. reset delay
p -
p -
p -
a
p -
p -
k c
n i
n i
n i
n i
n i
a
Figure 10. System block diagram
M
M
M
D
D
g
F
F
F
e
P I
P I
P
P
P
4.5V
Oscillator stabilization
time (10 to 100 ms)
LC7073, 7073M
Figure 8. Reset input
V DD
V DD
RES
RES
O
T
o
p
e t
e
V DD
n
m
1.125V
(0.25V DD min)
d -
p -
a r
o
n i
e l
C=0.1 F
Start point
u
s
0.8V DD
n i
g
M
O
S
t
a r
n
s
s i
o t
s r
O
u
p t
t u
y t
p
e
No.3932–8/9

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