lxt9763 Intel Corporation, lxt9763 Datasheet - Page 39

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lxt9763

Manufacturer Part Number
lxt9763
Description
Fast Ethernet 10/100 Hex Transceiver With Full Mii
Manufacturer
Intel Corporation
Datasheet

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2.1.3
2.1.3.1
2.1.4
Datasheet
Intel recommends filtering the power supply to the analog VCC pins of the LXT9763. This has
two benefits. First, it keeps digital switching noise out of the analog circuitry inside the LXT9763,
which helps line performance. Second, if the VCC planes are laid out correctly, it keeps digital
switching noise away from external connectors, reducing EMI problems.
The recommended implementation is to break the VCC plane into two sections. The digital section
supplies power to the VCCD and VCCIO pins of the LXT9763. The analog section supplies power
to the VCCA pins. The break between the two planes should run underneath the device. In
designs with more than one LXT9763, a single continuous analog VCC plane can be used to supply
them all.
The digital and analog VCC planes should be joined at one or more points by ferrite beads. The
beads should produce at least a 100 Ω impedance at 100 MHz. Beads should be placed so that
current flow is evenly distributed. The maximum current rating of the beads should be at least
150% of the current that is actually expected to flow through them. A bulk cap (2.2 -10 µ F) should
be place on each side of each bead.
In addition, a high-frequency bypass cap (.01 µ F) should be placed near each analog VCC pin.
Power and Ground Plane Layout Considerations
Great care needs to be taken when laying out the power and ground planes.
Chassis Ground
For ESD reasons, it is a good design practice to create a separate chassis ground that encircles the
board and is isolated via moats and keep-out areas from all circuit-ground planes and active
signals. Chassis ground should extend from the RJ45 connectors to the magnetics, and can be used
to terminate unused signal pairs (‘Bob Smith’ termination). In single-point grounding applications,
provide a single connection between chassis and circuit grounds with a 2 kV isolation capacitor. In
multi-point grounding schemes (chassis and circuit grounds joined at multiple points), provide
2 kV isolation to the Bob Smith termination.
MII Terminations
The LXT9763 MII has high output impedance (250 - 350 Ω ) and normally only requires
termination on the output signals in designs with long traces (>3 inches). Use series termination
resistors on all RX_CLK and TX_CLK signals to minimize reflections. Place the resistor as close
to the device as possible. Use a software trace termination package to select an optimal resistance
value for the specific trace. If this is not possible, use a 50 Ω resistor value.
Follow the guidelines in the LXT9761/62/63/81/82 Design & Layout Guide for locating the
split between the digital and analog VCC planes.
Keep the digital VCC plane away from the TPFOP/N and TPFIP/N signals, away from the
magnetics, and away from the RJ45 connectors.
Place the layers so that the TPFOP/N and TPFIP/N signals can be routed near or next to the
ground plane. For EMI reasons, it is more important to shield TPFOP/N than TPFIP/N.
Fast Ethernet 10/100 Hex Transceiver with Full MII — LXT9763
39

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