lxt9785 Intel Corporation, lxt9785 Datasheet - Page 124

no-image

lxt9785

Manufacturer Part Number
lxt9785
Description
Advanced 8-port 10/100 Mbps Phy Transceivers
Manufacturer
Intel Corporation
Datasheet

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
lxt9785EHC
Quantity:
320
Part Number:
lxt9785EHC D0
Quantity:
353
Part Number:
lxt9785EHC DO
Manufacturer:
INTEL
Quantity:
20 000
Part Number:
lxt9785HC
Quantity:
6
Part Number:
lxt9785HC
Manufacturer:
LEVELONE
Quantity:
20 000
Part Number:
lxt9785HC C2
Manufacturer:
INTEL
Quantity:
20 000
Part Number:
lxt9785HCB2
Manufacturer:
Intel
Quantity:
184
Part Number:
lxt9785MBC
Manufacturer:
INTEL
Quantity:
1 500
LXT9785 and LXT9785E Advanced 8-Port 10/100 Mbps PHY Transceivers
4.4.2.5
4.5
4.5.1
4.5.2
126
RxCLK Signal (SS-SMII only)
In SS-SMII mode, the LXT9785/LXT9785E provides a 125 MHz clock output in reference to the
output RxDatan. RxCLK is referenced and synchronized to the REFCLK. See
141.
Initialization
When the LXT9785/LXT9785E is first powered on, reset, or encounters a link failure state, it
checks the MDIO register configuration bits to determine the line speed and operating conditions
to use for the network link. The configuration bits may be set by the Hardware Control or MDIO
interface as shown in
MDIO Control Mode
In the MDIO Control mode, the LXT9785/LXT9785E reads the Hardware Control Interface pins to
set the initial (default) values of the MDIO registers. Once the initial values are set, bit control
reverts to the MDIO interface.
Hardware Control Mode
In the Hardware Control Mode, the LXT9785/LXT9785E disables direct write operations to the
MDIO registers via the MDIO Interface. On power-up or hardware reset, the LXT9785/LXT9785E
reads the Hardware Control Interface pins and sets the MDIO registers accordingly.
The following modes are available using either Hardware Control or MDIO Control:
When the network link is forced to a specific configuration, the LXT9785/LXT9785E immediately
begins operating the network interface as commanded. When auto-negotiation is enabled, the
LXT9785/LXT9785E begins the auto-negotiation/ parallel-detection operation.
Force network link to 100BASE-FX (Fiber).
Force network link operation to:
Allow auto-negotiation/parallel-detection.
Auto/Manual MDIX enable/disable.
Pause for full-duplex links operation.
Global Output Slew Rate Control.
— 100BASE-TX, Full-Duplex
— 100BASE-TX, Half-Duplex
— 10BASE-T, Full-Duplex
— 10BASE-T, Half-Duplex
Figure 13 on page
127.
Revision Date: August 28, 2003
Document Number: 249241
Figure 23 on page
Revision Number: 007
Datasheet

Related parts for lxt9785