IDT8535-01PG IDT [Integrated Device Technology], IDT8535-01PG Datasheet - Page 8

• Manufacturer Part Number: IDT8535-01PG
• Description: LOW SKEW, 1-TO-4 LVCMOS-TO-3.3V LVPECL FANOUT BUFFER
• Manufacturer: IDT [Integrated Device Technology]

TERMINATION FOR LVPECL OUTPUTS
ground) or current sources must be used for functionality. These outputs are designed to drive 50Ω transmission lines. Matched impedance techniques should
be used to maximize operating frequency and minimize signal distortion. The diagrams below show two different layouts which are recommended only as
guidelines. Other suitable clock layouts may exist. It is recommended that the board designers simulate to guarantee compatibility across all printed circuit and
clock component process variations.
APPLICATION INFORMATION
IDT8535-01
LOW SKEW, 1-TO-4 LVCMOS-TO-3.3V LVPECL
R
The clock layout topology shown below is a typical termination for LVPECL outputs. The two different layouts mentioned are recommended only as guidelines.
F
TT
OUT
=
and xF
F
(V
OUT
OH
+ V
OUT
LVPECL Output Termination, layout A
OL
are low impedance follower outputs that generate ECL/LVPECL compatible outputs. Therefore, terminating resistors (DC current path to
1
/ V
DD
- 2) - 2
Zo = 50Ω
Zo = 50Ω
Zo
50Ω
R
TT
50Ω
V
DD
F
- 2V
IN
8
F
OUT
COMMERCIAL AND INDUSTRIAL TEMPERATURE RANGES
LVPECL Output Termination, layout B
Zo = 50Ω
Zo = 50Ω
3
5
2
2
Zo
Zo
3.3V
3
5
2
2
Zo
Zo
F
IN