SDA9489X ETC [List of Unclassifed Manufacturers], SDA9489X Datasheet - Page 24

• Manufacturer Part Number: SDA9489X
• Description: PIP IV Advanced SOPHISTICUS High-End Picture-In-Picture ICs
• Manufacturer: ETC [List of Unclassifed Manufacturers]

SDA 9489X
SDA 9589X
Figure 4-8
Depending on the phase between inset and parent signals a correction of the display
raster for the read out data is performed. As the external VSP and HSP signals may
come from different devices with different delay paths, the phase between V-sync and
H-sync is adjustable (VSPDEL). An incorrect setting of VSPDEL may result in wrong or
unreliable field detection of parent channel.
Normally a noise reduction of the incoming parent vertical pulse is performed. With this
function missing vertical pulses are compensated. The circuit works for 50/60 Hz
applications as well as progressive and 100/120Hz application. (S)VGA signals are
supposed to be very stable and therefore not supported by the noise suppression. By
means of VSPNSRQ, vertical noise suppression is switched off.
A great variety of combinations of inset and parent frequencies are possible. The
following table shows some constellations.
Micronas
HSP
VSP
VSPD
(internal)
values in brackets () apply for 100Hz systems
Field detection and phase adjustment of vertical pulse (VSP)
tH/2 = 32 (16) ←s
field 0 window
VSPDEL
tH = 64 (32) ←s
VSPDEL
field 1 window
max
=151 (75) ←s
Preliminary Data Sheet
System Description
4-24