74HC/HCT137 Philips Semiconductors (Acquired by NXP), 74HC/HCT137 Datasheet - Page 2

• Manufacturer Part Number: 74HC/HCT137
• Description: 3-to-8 Line Decoder/demultiplexer With Address Latches; Inverting
• Manufacturer: Philips Semiconductors (Acquired by NXP)

Philips Semiconductors
FEATURES
GENERAL DESCRIPTION
The 74HC/HCT137 are high-speed Si-gate CMOS devices
and are pin compatible with low power Schottky TTL
(LSTTL). They are specified in compliance with JEDEC
standard no. 7A.
QUICK REFERENCE DATA
GND = 0 V; T
Notes
1. C
2. For HC the condition is V
ORDERING INFORMATION
See
December 1990
SYMBOL
t
C
C
PHL/
Combines 3-to-8 decoder with 3-bit latch
Multiple input enable for easy expansion or independent
controls
Active LOW mutually exclusive outputs
Output capability: standard
I
3-to-8 line decoder/demultiplexer with
address latches; inverting
I
PD
CC
f
f
C
V
For HCT the condition is V
i
o
“74HC/HCT/HCU/HCMOS Logic Package Information”
CC
PD
= input frequency in MHz
L
t
category: MSI
= output frequency in MHz
(C
PLH
= output load capacitance in pF
P
= supply voltage in V
is used to determine the dynamic power dissipation (P
L
D
= C
V
amb
CC
PD
2
PARAMETER
propagation delay
input capacitance
power dissipation capacitance per package
= 25 C; t
A
LE to Y
E
E
V
f
n
1
2
o
CC
) = sum of outputs
to Y
to Y
to Y
2
n
n
n
n
r
f
i
= t
f
I
I
= 6 ns
= GND to V
= GND to V
(C
L
V
CC
2
CC
CC
f
o
) where:
1.5 V
2
.
The 74HC/HCT137 are 3-to-8 line decoder/demultiplexers
with latches at the three address inputs (A
essentially combines the 3-to-8 decoder function with a
3-bit storage latch. When the latch is enabled (LE = LOW),
the “137” acts as a 3-to-8 active LOW decoder. When the
latch enable (LE) goes from LOW-to-HIGH, the last data
present at the inputs before this transition, is stored in the
latches. Further address changes are ignored as long as
LE remains HIGH.
The output enable input (E
the outputs independent of the address inputs or latch
operation. All outputs are HIGH unless E
is HIGH.
The “137” is ideally suited for implementing
non-overlapping decoders in 3-state systems and strobed
(stored address) applications in bus oriented systems.
CONDITIONS
C
notes 1 and 2
D
L
in W):
= 15 pF; V
CC
= 5 V
1
HC
18
17
15
15
3.5
57
and E
TYPICAL
74HC/HCT137
2
Product specification
) controls the state of
HCT
19
21
17
15
3.5
59
1
n
is LOW and E
). The “137”
UNIT
ns
ns
ns
ns
pF
pF
2