74HC/HCT163 Philips Semiconductors (Acquired by NXP), 74HC/HCT163 Datasheet
74HC/HCT163
Related parts for 74HC/HCT163
74HC/HCT163 Summary of contents
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... For a complete data sheet, please also download: The IC06 74HC/HCT/HCU/HCMOS Logic Family Specifications The IC06 74HC/HCT/HCU/HCMOS Logic Package Information The IC06 74HC/HCT/HCU/HCMOS Logic Package Outlines 74HC/HCT163 Presettable synchronous 4-bit binary counter; synchronous reset Product specification File under Integrated Circuits, IC06 ...
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... Output capability: standard I category: MSI CC GENERAL DESCRIPTION The 74HC/HCT163 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A. The 74HC/HCT163 are synchronous presettable binary counters which feature an internal look-ahead carry and can be used for high-speed counting ...
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... V) parallel enable input (active LOW) count enable carry input flip-flop outputs terminal count output positive supply voltage Fig.2 Logic symbol. 3 Product specification 74HC/HCT163 Fig.3 IEC logic symbol. ...
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... LOW-to-HIGH CP transition December 1990 Fig.4 Functional diagram. INPUTS MR CP CEP CET Product specification 74HC/HCT163 OUTPUTS ( ( count ( ...
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... Philips Semiconductors Presettable synchronous 4-bit binary counter; synchronous reset Fig.6 Typical timing sequence: reset outputs to zero; preset to binary twelve; count to thirteen, fourteen, fifteen, zero, one and two; inhibit. December 1990 Fig.5 State diagram. 5 Product specification 74HC/HCT163 ...
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... Philips Semiconductors Presettable synchronous 4-bit binary counter; synchronous reset December 1990 Fig.7 Logic diagram. 6 Product specification 74HC/HCT163 ...
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... Product specification 74HC/HCT163 . TEST CONDITIONS UNIT WAVEFORMS 125 (V) 280 2.0 Fig 4.5 48 6.0 320 2.0 Fig 4.5 55 6.0 180 2.0 Fig 4.5 31 6.0 110 2.0 Figs 8 and 9 ...
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... The value of additional quiescent supply current ( I To determine I per input, multiply this value by the unit load coefficient shown in the table below. CC INPUT UNIT LOAD COEFFICIENT MR 0.95 CP 1.10 CEP 0.25 D 0.25 n CET 0.75 PE 0.30 December 1990 ) for a unit load given in the family specifications Product specification 74HC/HCT163 . ...
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... Product specification 74HC/HCT163 TEST CONDITIONS UNIT WAVEFORMS 125 ( 4.5 Fig 4.5 Fig 4.5 Fig 4.5 Figs 8 and 9 ns 4.5 Fig.8 ns 4.5 Figs 10 and 11 ns 4.5 Fig. ...
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... 50 GND HCT 1 GND Fig.10 Waveforms showing the set-up and hold times for the input (D December 1990 , TC) propagation delays, the clock pulse width, the n ) and parallel enable input (PE Product specification 74HC/HCT163 ...
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... Fig.12 Waveforms showing the CEP and CET set-up and hold times. APPLICATION INFORMATION The HC/HCT163 facilitate designing counters of any modulus with minimal external logic. The output is glitch-free due to the synchronous reset. Fig.13 Modulo-5 counter. December 1990 Fig.14 Modulo-11 counter. PACKAGE OUTLINES See “74HC/HCT/HCU/HCMOS Logic Package Outlines” 11 Product specification 74HC/HCT163 . ...