A43L8316AV AMICC [AMIC Technology], A43L8316AV Datasheet - Page 29

• Manufacturer Part Number: A43L8316AV
• Description: 128K X 16 Bit X 2 Banks Synchronous DRAM
• Manufacturer: AMICC [AMIC Technology]

(September, 2003, Version 1.0)
Page Write Cycle at Different Bank @Burst Length=4
CLOCK
ADDR
* Note:
1. To interrupt burst write by Row precharge, DQM should be asserted to mask invalid input data.
2. To interrupt burst write by Row precharge, both the write and precharge banks must be the same.
A8/AP
RAS
CAS
DQM
CKE
DQ
CS
BA
WE
Row Active with
0
(A-Bank)
RAa
RAa
1
2
3
(A-Bank)
DAa0 DAa1 DAa2 DAa3
Write
CAa
4
Row Active
(B-Bank)
RBb
RBb
5
6
7
t
CDL
(B-Bank)
Write
DBb0
CBb
8
DBb1
28
9
High
DBb2 DBb3 DAc0 DAc1
10
11
(A-Bank)
CAc
Write
12
13
(B-Bank)
DBd0 DBd1
Write
CBd
AMIC Technology, Corp.
14
*Note 1
15
t
RDL
16
(Both Banks)
Precharge
A43L8316A
*Note 2
17
: Don't care
18
19