HFA3783IN96 INTERSIL [Intersil Corporation], HFA3783IN96 Datasheet - Page 10

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HFA3783IN96

Manufacturer Part Number
HFA3783IN96
Description
I/Q Modulator/Demodulator and Synthesizer
Manufacturer
INTERSIL [Intersil Corporation]
Datasheet

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HFA3783IN96
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Quantity:
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PLL Synthesizer and DC Offset Clock Programming Table
Phase Lock Loop Electrical Specifications
R Counter
A/B Counter
Operating 2X LO Frequency
Reference Oscillator Frequency
Selectable Prescaler Ratios (2 Settings)
Swallow Counter Divide Ratio (A Counter)
Programmable Counter Divide Ratio
(B Counter)
Reference Counter Divide Ratio (R Counter)
Reference Oscillator Sensitivity
Reference Oscillator Duty Cycle
Charge Pump Sink/Source Current/Tolerance
Charge Pump Sink/Source Current/Tolerance
Charge Pump Sink/Source Current/Tolerance
Charge Pump Sink/Source Current/Tolerance
Charge Pump Sink/Source Mismatch
Charge Pump Output Compliance
Charge Pump High Z leakage
Charge Pump Supply Voltage
Serial Interface Clock Width
Serial Interface Data/Clk Set-Up Time
Serial Interface Data/Clk Hold Time
Serial Interface Clk/LE Set-Up Time
Serial Interface LE Pulse Width
SERIAL
BITS
PE1
X
0
1
1
0
LSB 1
DEFINITION
REGISTER
0
0
PE2
PARAMETER
X
0
1
0
1
2
0
1
R(0) R(1) R(2) R(3) R(4) R(5) R(6) R(7) R(8) R(9) R(10) R(11) R(12) R(13) R(14)
A(0) A(1) A(2) A(3) A(4) A(5) A(6) B(0) B(1) B(2)
3
10
(SERIAL BUS)
4
PLL_PE
1
1
1
1
0
5
6
Power Down State, PLL Registers in Save Mode, Inactive PLL, Active Serial Interface
Receive State, Active PLL
Transmit State, Active PLL
Inactive Transmit and Receive States, Active PLL, Active Serial Interface
Inactive PLL, Disabled PLL Registers, Active Serial Interface
7
POWER ENABLE TRUTH TABLE
Test Diagram
Test Diagram
Single or Differential Sine
Inputs
CMOS Single or
Complementary
CMOS Inputs
250 A Selection +/- 25%
500 A Selection +/- 25%
750 A Selection +/- 25%
1mA Selection +/- 25%
High Z state
High Level
Low level
8
TEST CONDITIONS
HFA3783
9
10
11
12
B(3)
TEMP.
13
(
Full
Full
Full
Full
Full
Full
Full
Full
Full
Full
Full
Full
Full
Full
Full
Full
Full
Full
Full
Full
Full
Full
Full
o
C)
STATUS
B(4)
14
16/17
0.375
0.18
0.56
0.75
MIN
140
-10
0.5
0.5
2.7
40
20
20
20
10
20
20
0
3
3
-
-
-
B(5)
15
B(6)
16
CMOS
TYP
0.25
0.75
N/A
0.5
1.0
0.1
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
B(7)
17
CPV
32767
32/33
0.625
MAX
1200
2047
0.32
0.94
1.25
127
B(8)
3.6
50
60
15
10
DD
18
-
-
-
-
-
-
-
-
X (Don’t Care)
-
0.5
B(9) B(10)
19
UNITS
MHz
MHz
V
mA
mA
mA
mA
ns
ns
ns
ns
ns
ns
%
%
V
V
PP
-
-
-
-
-
A
MSB

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