lc8902 Sanyo Semiconductor Corporation, lc8902 Datasheet - Page 11

• Manufacturer Part Number: lc8902
• Description: Digital Audio Interface Receiver
• Manufacturer: Sanyo Semiconductor Corporation

Errors
1. ERROR pin: This pin goes high when there are errors in the input data or when the PLL circuit is unlocked. When
2. Data processing when an error occurs: The table lists the data processing performed when an error occurs.
Analog Source Mode
The LC8902/Q switches to analog source in the following two cases.
1. When analog source mode is selected by the data sent over the microcomputer interface
2. When there is no signal on the input pin selected for data demodulation
Crystal Oscillator
1. The presence or absence of data is determined by an internal detection circuit. This circuit operates on either the
2. The XIN and XOUT pins include a built-in oscillator amplifier circuit, and take on the following states when a
data demodulation returns to normal, the high level is held for about 200 to 300 ms and then the ERROR pin goes
low. This time is inversely proportional to the fs of the input data.
In analog source mode, the clock that runs the whole system is supplied by the crystal oscillator clock and the PLL
circuit and data demodulation are stopped. The BCLK, LRCK, CLK, OUT1 and CLKOUT2 clocks are output.
The output pins function as follows in analog source mode.
• DOUT1, DOUT2
• ERROR
• SUB1, SUB2
• DATAOUT
• EMPHA
• Microcomputer interface codes
VCO or the crystal oscillator clock. When power is first applied, the clock is supplied from the VCO, and the
LC8902/Q switches to the crystal oscillator if a no data state is detected. Here, if a clock signal was not supplied
from the crystal oscillator after a no data state is detected, the whole system would stop and remain in the stopped
state, since the detection circuit would not operate even if data were supplied.
crystal oscillator is connected.
Note: Preamble detection is used to recognize PLL lock errors.
Note: * The XIN pin is pulled-up internally when the LC8902/Q is in the data present state.
Up to 8 consecutive parity errors
Nine or more consecutive
parity errors
PLL lock error
Data specified through the microcomputer interface is output.
The lock error state high level is output.
The “#1” lock error state code is output.
The lock error state low level is output.
The lock error state low level is output.
Input codes: The code values set through the microcomputer interface are retained.
Output codes: Values identical to those for a PLL lock error are output.
XOUT
XIN
Pin
Error Type
Data Present*
High
Low
Accepts crystal oscillator input.
Outputs the inverted state of the XIN pin.
Previous data value output
Data with the value zero is output.
Data with the value zero is output.
Audio Output Data
Data Absent
LC8902, 8902Q
Retained
Retained
Data is cleared and the “#1” state is
indicated.
FS Output Code
No. 4333-11/14