lc8902 Sanyo Semiconductor Corporation, lc8902 Datasheet

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lc8902

Manufacturer Part Number
lc8902
Description
Digital Audio Interface Receiver
Manufacturer
Sanyo Semiconductor Corporation
Datasheet
Ordering number : EN4333A
Overview
The LC8902 and LC8902Q are receiver LSIs for
applications in which data is transmitted between digital
audio equipment in the EIAJ format. These LSIs
synchronize with the input signal and demodulate that
signal to a regular format signal.
Features
• Built-in PLL circuit synchronizes with the input EIAJ
• Microcomputer interface receives mode settings and
• Supports both 384 fs and 512 fs system clocks
• Can operate in either digital source mode or analog
• User bit CD subcode interface
• DIP42S and QIP44M packages
• Si gate CMOS process, single 5 V power supply
format signal.
outputs fs codes, copy information, and category codes.
(selectable) and provides 256 fs, 128 fs, BCLK and
LRCK clock outputs.
source mode.
SANYO Electric Co.,Ltd. Semiconductor Bussiness Headquarters
TOKYO OFFICE Tokyo Bldg., 1-10, 1 Chome, Ueno, Taito-ku, TOKYO, 110-8534 JAPAN
Any and all SANYO products described or contained herein do not have specifications that can handle
applications that require extremely high levels of reliability, such as life-support systems, aircraft’s
control systems, or other applications whose failure can be reasonably expected to result in serious
physical and/or material damage. Consult with your SANYO representative nearest you before using
any SANYO products described or contained herein in such applications.
SANYO assumes no responsibility for equipment failures that result from using products at values that
exceed, even momentarily, rated values (such as maximum ratings, operating condition ranges, or other
parameters) listed in products specifications of any and all SANYO products described or contained
herein.
Package Dimensions
unit: mm
3025B-DIP42S
unit: mm
3148-QFP44MA
Digital Audio Interface Receiver
O2494TH VL-0947, 0948/D0392HK No. 4333-1/14
[LC8902Q]
[LC8902]
LC8902, 8902Q
SANYO: QIP44MA
SANYO: DIP42S
CMOS LSI

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lc8902 Summary of contents

Page 1

... Ordering number : EN4333A Overview The LC8902 and LC8902Q are receiver LSIs for applications in which data is transmitted between digital audio equipment in the EIAJ format. These LSIs synchronize with the input signal and demodulate that signal to a regular format signal. Features • Built-in PLL circuit synchronizes with the input EIAJ format signal. • ...

Page 2

... Digital source mode: EIAJ CP-1201 format data reception mode Analog source mode: Analog data is received and converted to digital for signal processing. This figure shows an example of a structure using the LC8902/Q. In analog source mode the only function of the LC8902 provide control clocks. ...

Page 3

... WBO Output setup time t DSO Output data hold time t DHO Output delay (high) t bdH Output delay (low) t bdL Note: 6. For an input data kHz, with load capacitance on each pin. LC8902, 8902Q Conditions = 4 Conditions * –1 µ µA ...

Page 4

... SBCK fall time tfC SBCK delay time tCD P data access tPAC Data hold time tHD Note: Assumes that the load capacitance on each output pin is 30 pF. LC8902, 8902Q Conditions CL, CE, DI CL, CE, DI With load capacitance With load capacitance Conditions * ...

Page 5

... The LC8902/Q uses the subcode synchronization word and the start bit in the user bits for subcode interface system timing extraction. Therefore, SBSY and SFSY change depending on that timing. Keep the following notes on user bit transfer in mind when using the values of tBW, tF, tCHW and tCD within the specifications described above. Basically, user bit transfers must follow the table shown here ...

Page 6

... Microprocessor interface input Microprocessor interface chip enable input Microprocessor interface clock input Digital power supply DIN1 DIN2 I Data inputs with built-in amplifiers 42 3 DIN3 DIN4 DGND Digital ground LC8902, 8902Q Function No. 4333-6/14 ...

Page 7

... Block Diagram Clock Modes The LC8902/Q CLKOUT1 and CLKOUT2 output clock modes are selected by the CLK and CLKMD pins according to the table. CLK CLK OUT1 L 384 fs clock output H 512 fs clock output CLK MD CLK OUT2 L 256 fs clock output* H 128 fs clock output Note: * When the CLK pin is low, the 256 fs clock duty has a high to low ratio of 2:1. ...

Page 8

... Microcomputer Interface Formats Address The bits the format figure are the address. There are two addresses allocated to the LC8902/Q, one for input and one for output. The microprocessor must specify the input address to input data and the output address to output data. ...

Page 9

... Note: Setting the data demodulation input code to one of the XSYS settings switches the system clock from the VCO to the crystal oscillator and sets the LC8902/Q to analog source mode. Selecting one of the input pins once again sets the LC8902/Q to digital source mode and PLL operation. ...

Page 10

... CD Subcode Interface The LC8902/Q uses the SFSY, SBCK, PW and SBSY pins to output the CD subcode data. This data is the user bits that were transferred according to the CP-1201 interface format and converted to a format that conforms to the CP-2401 interface format. The timing is shown in the figures. ...

Page 11

... VCO or the crystal oscillator clock. When power is first applied, the clock is supplied from the VCO, and the LC8902/Q switches to the crystal oscillator data state is detected. Here clock signal was not supplied from the crystal oscillator after a no data state is detected, the whole system would stop and remain in the stopped state, since the detection circuit would not operate even if data were supplied ...

Page 12

... V. 1. Once the LC8902/Q is operating, the system will be reset if a low level is applied once again to the XMODE pin. 2. This IC can be used without using the microcomputer interface by tying the CE, CL and DI microcomputer interface input pins low and using D1 as the data input pin ...

Page 13

... Sample Application Circuit Circuit Constants Item Symbol Value 5.6 k Resistors R5 5 120 to 150 R7 200 R8 200 k LC8902, 8902Q Item Symbol Value C1 1000 100 µF C3 0.1 µF C4 0.01 µF Capacitors No. 4333-13/14 ...

Page 14

... SANYO believes information herein is accurate and reliable, but no guarantees are made or implied regarding its use or any infringements of intellectual property rights or other rights of third parties. This catalog provides information as of August, 1998. Specifications and information herein are subject to change without notice. LC8902, 8902Q PS No. 4333-14/14 ...

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