lc89058w Sanyo Semiconductor Corporation, lc89058w Datasheet - Page 22

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lc89058w

Manufacturer Part Number
lc89058w
Description
Cmos Digital Audio Interface Receiver
Manufacturer
Sanyo Semiconductor Corporation
Datasheet

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10.1.6 PLL clock output
• The PLL clock output is controlled by the PLLACC, PLLDV1, PLLDV2, or PRSEL[1:0].
• PLLACC can be used to generate a PLL lock frequency for each S/PDIF input sampling frequency band.
Table 10.2: PLL Clock Output Frequencies (Bold settings are recommended values.)
• If 128kHz, 176.4kHz or 192kHz input is received when the PLLACC is set to 0 and the PRSEL [1:0] to 01, the DC
characteristics of output directly sent to the RMCK pin cannot be guaranteed. In such a case, set the frequency to one
half or quarter of the PLL clock frequency (PRSEL [1:0]=00 or 10).
176.4kHz
44.1kHz
88.2kHz
128kHz
192kHz
S/PDIF
32kHz
48kHz
64kHz
96kHz
fs
32k, 44.1k, 48k
Lock detection
Fs calculation
S/PDIF Input
PLL output
“PLLACC”
“PLLDV0”
512fs
256fs
Fs=
Lock
PRSEL=00
Yes
11.28MHz
12.28MHz
16.38MHz
22.57MHz
24.57MHz
32.76MHz
45.15MHz
49.15MHz
8.19MHz
1
1
PLLACC=0 (Fixed multiple outputs of input fs)
(256fs)
Unlock
PLL output
0
0
No
512fs
PRSEL=01
16.38MHz
22.57MHz
24.57MHz
32.76MHz
45.15MHz
49.15MHz
65.53MHz
90.31MHz
98.30MHz
(512fs)
*
Figure 10.3 PLL Clock Output Control
PLL output
Free-run
64k, 88.2k, 96k
PLL output
“PLLDV1”
PRSEL=10
512fs
11.28MHz
12.28MHz
16.38MHz
22.57MHz
24.57MHz
Fs=
4.09MHz
5.64MHz
6.14MHz
8.19MHz
(128fs)
LC89058W-E
Yes
1
PLL output
0
PLL Output
PLLDV0=0
PLLDV1=0
No
16.38MHz
22.57MHz
24.57MHz
16.38MHz
22.57MHz
24.57MHz
16.38MHz
22.57MHz
24.57MHz
256fs
“PRSEL=00”: 256fs
“PRSEL=01”: 512fs
“PRSEL=10”: 128fs
PLL fixation output
*: When the data is judged to exceed the value of
PLLACC=1 (Fixed multiple outputs for each input fs band)
FSLIM [1:0] which limits the reception frequency of
the input S/PDIF, processing similar to PLL
unlocking is carried out and the processing does not
proceed to the subsequent step. The clock source is
automatically switched to the XIN source.
128k, 176.4k, 192k
PLLDV0=1
PLLDV1=0
11.28MHz
12.28MHz
16.38MHz
22.57MHz
24.57MHz
16.38MHz
22.57MHz
24.57MHz
8.19MHz
PLL output
128fs
Fs=
Yes
PLLDV0=0
PLLDV1=1
16.38MHz
22.57MHz
24.57MHz
32.76MHz
45.15MHz
49.15MHz
16.38MHz
22.57MHz
24.57MHz
PLL output
No
256fs
No.A1056-22/64
PLLDV0=1
PLLDV1=1
11.28MHz
12.28MHz
32.76MHz
45.15MHz
49.15MHz
16.38MHz
22.57MHz
24.57MHz
8.19MHz

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