lc89052t Sanyo Semiconductor Corporation, lc89052t Datasheet - Page 10

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lc89052t

Manufacturer Part Number
lc89052t
Description
Digital Audio Interface Receiver
Manufacturer
Sanyo Semiconductor Corporation
Datasheet
1) In modes (3), (4), and (5), the clock supplied from the XIN pin is used as the source.
2) Mode (3) applies to the state where an external clock other than CKOUT is supplied to XIN. If XIN pin and CKOUT
3) Mode (6) applies when the PLL circuit is locked.
4) In mode (7), the states immediatly before the setup is retained.
The table below summaries the low-power modes.
The table below lists the output pin states in the above modes.
pin are connected, no clock signals are output in this mode.
When the PLL circuit is unlocked, all circuits are stopped since no clock signal is supplied from XIN pin.
Mode
Output pin
(1)
(2)
(3)
(4)
(5)
(6)
(7)
ERROR
CKOUT
DATAO
______
AUDIO
_____
LRCK
XOUT
E/INT
UGPI
BCK
High
Low
___
PD
Mode (1)
High
High
High
Low
Low
Low
Low
Low
Low
AMPOPR
×
0
0
0
0
1
1
Mode (2)
Output
Output
Output
Output
Output
Output
Output
Output
Output
Table 8.2 Output Pin States in Modes (1) to (7)
PLLOPR
×
×
×
0
1
0
1
Table8.1 Low-power Modes
Mode (3)
Output
Output
Output
Output
Output
Output
High
Low
Low
LC89052T
PDOWN1
×
0
0
0
1
0
×
Mode (4)
Output
Output
Output
High
Low
Low
Low
Low
Low
PDOWN0
×
0
0
1
0
0
×
Mode (5)
Output
Output
Output
Output
Output
Output
High
Low
Low
Reset (stand-by)
Normal operation
VCO stopped.
All circuits except the oscillator amplifier
stopped.
All circuits except the oscillator amplifier and
divider circuit stopped.
Oscillator amplifier stopped.
All circuits stopped.
Mode (6)
Output
Output
Output
Output
Output
Output
Output
Output
High
Function
No.7457-10/42
Mode (7)
Output
L or H
L or H
High
High
Low
Low
Low
Low

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