m35b32 STMicroelectronics, m35b32 Datasheet - Page 26

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m35b32

Manufacturer Part Number
m35b32
Description
32 Kbit, 256-byte Page, Fast Program Eeprom Memory Accessed By Spi Bus Interface
Manufacturer
STMicroelectronics
Datasheet
Instructions
6.9
26/42
Figure 14. Page Program (PP) instruction sequence
1. 1 n 256.
2. Address bits A15 to A12 are Don’t Care.
ECC (error correction code) and write cycling
The M35B32 devices offer an ECC (error correction code) logic which compares each 4-
byte word with its associated 6 EEPROM bits of ECC. As a result, if a single bit out of
4 bytes of data happens to be erroneous during a read operation, the ECC detects it and
replaces it with the correct value. The read reliability is therefore much improved by the use
of this feature.
Note, however, that even if a single byte has to be written, 4 bytes are internally modified
(plus the ECC bits), that is, the addressed byte is cycled together with the other three bytes
making up the word. It is therefore recommended to write data by word (4 bytes) at address
4*N (where N is an integer) in order to benefit from the larger amount of Write cycles.
Those devices are qualified at 1 million (1 000 000) write cycles, using a cycling routine that
writes to the device by multiples of 4-byte packets.
S
C
D
Q
0
1
High Impedance
2
Instruction
3
4
5
Doc ID 18391 Rev 3
6
7
15
8
14 13
9 10
16-Bit Address
3
20 21 22 23 24 25 26 27
2
1
0
7
6
5
Data Byte
4
3
28 29 30
2
1
0
31
M35B32
AI01795D

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