m35b32 STMicroelectronics, m35b32 Datasheet - Page 17

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m35b32

Manufacturer Part Number
m35b32
Description
32 Kbit, 256-byte Page, Fast Program Eeprom Memory Accessed By Spi Bus Interface
Manufacturer
STMicroelectronics
Datasheet
M35B32
6.1
6.2
Write Enable (WREN)
The Write Enable (WREN) instruction
The Write Enable Latch (WEL) bit must be set prior to every Page Write (PW), Page
Program (PP), Page Erase (PE), and Sector Erase (SE) instruction.
The Write Enable (WREN) instruction is entered by driving Chip Select (S) low, sending the
instruction code, and then driving Chip Select (S) high.
Figure 7.
Write Disable (WRDI)
The Write Disable (WRDI) instruction
The Write Disable (WRDI) instruction is entered by driving Chip Select (S) low, sending the
instruction code, and then driving Chip Select (S) high.
The Write Enable Latch (WEL) bit is reset under the following conditions:
Figure 8.
Power-up
Write Disable (WRDI) instruction completion
Page Write (PW) instruction completion
Page Program (PP) instruction completion
Page Erase (PE) instruction completion
Sector Erase (SE) instruction completion
Write Enable (WREN) instruction sequence
Write Disable (WRDI) instruction sequence
S
C
D
Q
S
C
D
Q
Doc ID 18391 Rev 3
High Impedance
0
High Impedance
0
1
1
(Figure
(Figure
2
2
Instruction
Instruction
3
3
4
4
8) resets the Write Enable Latch (WEL) bit.
7) sets the Write Enable Latch (WEL) bit.
5
5
6
6
7
7
AI03750D
AI02281E
Instructions
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