cn8236 Mindspeed Technologies, cn8236 Datasheet - Page 378
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cn8236
Manufacturer Part Number
cn8236
Description
Atm Servicesar Plus With Xbr Traffic Management
Manufacturer
Mindspeed Technologies
Datasheet
1.CN8236.pdf
(443 pages)
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16.0 Electrical and Mechanical Specifications
16.1 Timing
Table 16-1. PCI Bus Interface Timing Parameters (2 of 2)
Figure 16-1. PCI Bus Input Timing Measurement Conditions
16-2
NOTE(S):
(1)
(2)
(3)
Symbol
See
See
minimum delays are measured with a 0 pF load.
Applicable when STAT outputs configured as BOM cell synchronization signals.
t
rst-off
t
t
t
val
off
on
Figure 16-1
Figure 16-2
HCLK to HAD Valid Delay
HCLK to HC/BE Valid Delay
HCLK to HPAR Valid Delay
HCLK to HFRAME* Valid Delay
HCLK to HIRDY* Valid Delay
HCLK to HSTOP* Valid Delay
HCLK to HDEVSEL Valid Delay
HCLK to HPERR* Valid Delay
HCLK to HREQ Valid Delay
HCLK to HSERR* Valid Delay
HCLK to STAT Valid Delay
Float to Active Delay—All Three-state Outputs
Active to Float Delay—All Three-state Outputs
Reset Active to Output Float Delay
for waveforms and definitions.
for waveforms and definitions. The maximum output delays are measured with a 50 pF load, and the
HCLK
Input
Parameter
(2)
Mindspeed Technologies
(3)
(2)
(2)
(2)
(2)
(2)
(2)
(2)
(2)
(2)
t
t
cyc
low
t
su
(2)
(2)
t
t
h
ATM ServiceSAR Plus with xBR Traffic Management
high
™
Min
—
—
2
2
2
2
2
2
2
2
2
2
2
2
Max
11
11
11
11
11
11
11
11
12
11
20
—
23
40
28236-DSH-001-B
CN8236
Units
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
8236_078
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