gvt7164b18 Cypress Semiconductor Corporation., gvt7164b18 Datasheet - Page 3

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gvt7164b18

Manufacturer Part Number
gvt7164b18
Description
64k X 18 Synchronous Burst Sram Semiconductor
Manufacturer
Cypress Semiconductor Corporation.
Datasheet
Pin Configuration
Pin Descriptions
Document #: 38-05204 Rev. *A
32, 100, 99, 82, 81,
37, 36, 35, 34, 33,
80, 48, 47, 46, 45,
QFP Pins
93, 94
44
87
88
89
98
92
97
WEL, WEH
Pin Name
A0–A16
BWE
CLK
CE2
CE2
GW
CE
Synchronous
Synchronous
Synchronous
Synchronous
Synchronous
Synchronous
Synchronous
Synchronous
DQP2
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
DQ16
V
V
V
V
V
V
V
V
DQ9
V
CCQ
CCQ
V
CCQ
CCQ
SSQ
SSQ
SSQ
SSQ
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
CC
SS
Input-
Input-
Input-
Input-
Input-
Input-
Input-
Input-
Type
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
Addresses: These inputs are registered and must meet the set-up and hold
times around the rising edge of CLK. The burst counter generates internal
addresses associated with A0 and A1, during burst and wait cycles.
Byte Write Enables: A byte Read enable is LOW for a Write cycle and HIGH
for a Read cycle. WEL controls DQ1–DQ8 and DQP1. WEH controls
DQ9–DQ16 and DQP2. Data I/O are high impedance if either of these inputs
are LOW, conditioned by BWE LOW.
Write Enable: This active LOW input gates byte Read operations and must
meet the set-up and hold times around the rising edge of CLK.
Global Write: This active LOW input allows a full 18-bit Write to occur
independent of the BWE and WEn lines and must meet the set-up and hold
times around the rising edge of CLK.
Clock: This signal registers the addresses, data, chip enables, Write control
and burst control inputs on its rising edge. All synchronous inputs must meet
set-up and hold times around the clock’s rising edge.
Chip Enable: This active LOW input is used to enable the device and to gate
ADSP.
Chip Enable: This active LOW input is used to enable the device.
Chip Enable: This active HIGH input is used to enable the device.
CY7C1297A/GVT7164B18
100-pin TQFP
Top View
Description
80
79
78
77
76
75
74
73
72
71
70
69
68
67
66
65
64
63
62
61
60
59
58
57
56
55
54
53
52
51
A10
NC
NC
V
V
NC
DQP1
DQ8
DQ7
V
V
DQ6
DQ5
V
NC
V
ZZ
DQ4
DQ3
V
V
DQ2
DQ1
NC
NC
V
V
NC
NC
NC
CCQ
SSQ
SSQ
CCQ
SS
CC
CCQ
SSQ
SSQ
CCQ
GVT7164B18
CY7C1297A/
Page 3 of 13

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