pa28f004sc-120 Intel Corporation, pa28f004sc-120 Datasheet - Page 18

• Manufacturer Part Number: pa28f004sc-120
• Description: 8-mbit 1-mbit X 8 Flashfiletm Memory
• Manufacturer: Intel Corporation

28F008SA
V
Command Status Registers
Byte write and block erase completion are not guar-
anteed if V
of the Status Register (SR 3) is set to ‘‘1’’ a Clear
Status Register command MUST be issued before
further byte write block erase attempts are allowed
by the WSM Otherwise the Byte Write (SR 4) or
Erase (SR 5) Status bits of the Status Register will
be set to ‘‘1’’s if error is detected RP
V
operations Data is partially altered in either case
and the command sequence must be repeated after
normal operation is restored Device poweroff or
RP
initial value 10000 for the upper 5 bits
The Command User Interface latches commands as
issued by system software and is not altered by V
or CE
powerup after exit from deep powerdown or after
V
After byte write or block erase is complete even
after V
User Interface must be reset to Read Array mode via
the Read Array command if access to the memory
array is desired
Power Up Down Protection
The 28F008SA is designed to offer protection
against accidental block erasure or byte writing dur-
ing
28F008SA is indifferent as to which power supply
V
ing is not required Internal circuitry in the 28F008SA
18
IL
CC
PP
CC
during byte write and block erase also abort the
or V
transitions below V
transitions to V
power
V
PP
PP
transitions or WSM actions Its state upon
CC
transitions down to V
PP
powers up first Power supply sequenc-
RP
drops below V
transitions
Transitions and the
IL
LKO
clear the Status Register to
PPH
Upon
is Read Array Mode
PPL
If the V
power-up
the Command
transitions to
PP
Status bit
the
PP
ensures that the Command User Interface is reset to
the Read Array mode on power up
A system designer must guard against spurious
writes for V
active Since both WE
command write driving either to V
writes The Command User Interface architecture
provides an added level of protection since altera-
tion of memory contents only occurs after success-
ful completion of the two-step command sequences
Finally the device is disabled until RP
V
provides an additional level of memory protection
Power Dissipation
When designing portable systems designers must
consider battery power consumption not only during
device operation but also for data retention during
system idle time Flash nonvolatility increases us-
able battery life because the 28F008SA does not
consume any power to retain code or data when the
system is off
In addition the 28F008SA’s deep powerdown mode
ensures extremely low power dissipation even when
system power is applied For example portable PCs
and other power sensitive applications using an ar-
ray of 28F008SAs for solid-state storage can lower
RP
negligable power consumption If access to the
28F008SA is again needed the part can again be
read following the t
required after RP
AC Characteristics Read-Only and Write Opera-
tions and Figures 10 and 11 for more information
IH
regardless of the state of its control inputs This
to V
IL
CC
in standby or sleep modes producing
voltages above V
PHQV
is first raised back to V
and CE
and t
PHWL
LKO
must be low for a
wakeup cycles
IH
when V
is brought to
will inhibit
IH
PP
See
is