as4c8m16s Alliance Memory, Inc, as4c8m16s Datasheet - Page 45
as4c8m16s
Manufacturer Part Number
as4c8m16s
Description
128mb/ 8m X 16 Bit Synchronous Dram Sdram
Manufacturer
Alliance Memory, Inc
Datasheet
1.AS4C8M16S.pdf
(52 pages)
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Figure 36.2. Full Page Read Cycle
CLK
WE#
A10
CKE
BA0,1
A0-A9,
A11
DQ
RAS#
CAS#
DQM
CS#
FEBRUARY 2011
Hi-Z
Activate
Cammand
Bank A
High
RAx
RAx
T0 T1 T2 T3 T4 T5 T6 T7 T8 T9 T10
Read
Command
Bank A
CAx
Activate
Cammand
Bank B
RBx
RBx
The burst counter wraps
from the highest order
page address back to zero
during this time interval
Ax
Ax+1
Ax+2
(Burst Length=Full Page, CAS# Latency=3)
Full Page burst operation does not
terminate when the burst length is
satisfied; the burst counter increments
and continues bursting beginning with
the starting address
Ax-2
Read
Command
Bank B
Ax-1
CBx
Ax
45
T11 T12T13 T14 T15 T16 T17 T18 T19T20 T21 T22
Ax+1
Bx
Bx+1 Bx+2
Burst Stop
Command
Bx+3 Bx+4
Precharge
Command
Bank B
Bx+5
t
RP
Don’t Care
Activate
Command
Bank B
RBy
RBy
AS4C8M16S
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