ia3513 integration, ia3513 Datasheet - Page 25

• Manufacturer Part Number: ia3513
• Description: Headset Voice And Power Solution
• Manufacturer: integration

Electrical Characteristics
GPIO Interruption Handling
Interruption signaling and notification is also available in the GPIO functionality. There is an interruption mask available by
register write for all the GPIOS; when the correspondent mask bit is set, a transition in the GPIO will assert the interruption bit in
Register 11.
Additional interruption sources
Besides the GPIOs there are five additional sources of interruption which are related with battery level.
Deeply discharged Battery interruption
When the Battery has crossed the deeply discharged threshold (2.9V), the DD bit in Register 11 will be set to 1. Upon this action
the IC will start a 5 s countdown and shutdown.
Battery threshold interruption
An interruption will be notified when the battery has crossed the predefined battery level, in this case the LB bit in Register 11
will be set. The trigger level can be changed by register write on bits BTH of register 11 and the output of the comparator can be
monitored on bit THO of register 6.
Battery charge termination interruption
When the battery charge is terminated an interruption is issued and bit CHT of 10 is set.
The battery status and control register (register 6) can be read to obtain information on the charge termination status,
Bit CF will be set if the charge has finished and bit Fault will be set if the charge has terminated abnormally.
Fuel gauge interruption
The Battery fuel gauge ADC can also be programmed to generate an interruption.
The ADC is activated on demand by asserting bit FGR of register 9, once the acquisition is concluded and the result available at
bits FGB of register 9, the FGR bit is cleared to indicate that the operation has concluded.
In order to avoid the need for constant reading of register 9, the FGI bit can be set, to generate an interruption whenever an ADC
acquisition is concluded. This interruption is notified on bit FGRI of register 10.
All interruptions previously mentioned can be enabled or disabled be using the interrupt mask register 16.
Charger Insertion (charge start) /Charger removal interruption
The CHI interruption is triggered both when the charger is inserted (plugged into the system), and when the charger is removed
(unplugged from the system). Whenever such event happens, the CHI bit of register 10 will go high, as well as the INT bit. To
ascertain which of the two events occurred, the register 6 should be read in addition, and if the charger was inserted, the ACHP
bit will be at 1, or if it was removed the ACHP bit will be at 0.
Upon a charger insertion (charge start) event (ACHP bit at 1), if the CHI interrupt is not acknowledged within a 100 ms time
window, a reset will be issued to the host as described in further details in the Host System Reset section.
Characteristics
Maximum input voltage GPIO 1,2,3 and 4
Maximum input voltage GPIO 5
VOL , CMOS mode (sink current 0.5mA)
VOH, CMOS mode (no load)
VOH , CMOS mode (source current 0.5mA)
VIL ,CMOS mode (rising input)
VIH, CMOS mode (falling input)
Hysteresis , CMOS mode
Input impedance, open drain mode
Input impedance , open drain high current mode
Input impedance , open drain low current mode
(DC-DC
output)
2.65
2.25
Min
25.5
Typ
220
1.5
0.5
13
1
Voltage)
(Battery
(DC-DC
output)
4.242
0.185
Max
2.75
Units
V
V
V
V
V
V
V
V
Ω
Ω
Ω
IA3513
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