ppc460ex Applied Micro Circuits Corporation (AMCC), ppc460ex Datasheet - Page 87

• Manufacturer Part Number: ppc460ex
• Description: Powerpc 460ex Embedded Processor
• Manufacturer: Applied Micro Circuits Corporation (AMCC)

Revision 1.12 – July 17, 2008
The DDR SDRAM controller times its operation using the internal PLB clock signal and generates MemClkOut from
the PLB clock. The PLB clock is an internal signal that cannot be directly observed. However MemClkOut is the
same frequency as the PLB clock signal and is in phase with the PLB clock signal.
Note: MemClkOut can be advanced with respect to the PLB clock by means of the SDRAM0_CLKTR
The signals are terminated as indicated in Figure 9 for the DDR timing data in the following sections.
Board Layout Restrictions
The paths (traces) for the data and the associated data strobe signal should be routed with the same length
between PPC460EX and the SDRAM devices, allowing the rising and falling edges of the strobe to arrive at the
capture logic at the same time the data is in transition. Board designs must meet both of the following criteria:
For example, traces that average 3.00 in. and 167ps/in., and meet the maximum 50ps skew requirement, have a
maximum length difference of 0.3in. and are between 2.85in. and 3.15in.
Clocking
Clocking skew to all DRAMs must be minimized. The maximum allowed is considered to be 10ps. Because of the
stringent requirements on DDR device clock inputs, it is expected that board designers will use some type of
external PLL suitable to redrive the clock to the DDR SDRAMs. In such a system, the PLL acts like a zero-delay
insertion buffer.
AMCC Proprietary
DDR2/1 SDRAM I/O Specifications
Preliminary Data Sheet
• Skew on the signals in any byte lane (8 DQ, 1 DQS, and 1 DM) should not exceed 50ps.
• Data and strobe signal trace lengths must be no more than 5in. and no less than 2.5in.
programming register. In a typical system, users advance MemClkOut by 90°. This depends on the specific
application and requires a thorough understanding of the memory system in general (refer to the DDR
SDRAM Controller chapter in the PowerPC 460EX Embedded Processor User’s Manual).
460EX – PPC460EX Embedded Processor
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