mt9v011p11st Micron Semiconductor Products, mt9v011p11st Datasheet - Page 9

• Manufacturer Part Number: mt9v011p11st
• Description: 1/4-inch Vga Cmos Active-pixel Digital Image Sensor
• Manufacturer: Micron Semiconductor Products

Output Data Timing
with the PIX CLK output. When LINE_V ALID is HIGH,
one 10-bit pixel datum is output every PIX CLK period.
timed to occur one-half of a master clock period after
the D
clock to latch the data. The PIX CLK is HIGH for one
complete master clock period and then LOW for one
complete master clock period. It is continuously
enabled, even during the blanking period. The
09005aef80c6407f
MT9V011_external_DS_2.fm - Rev. A 8/04 EN
The data output of the MT9V011 is synchronized
The rising edges of the PIXCLK signal are nominally
OUT
edges. This allows PIX CLK to be used as a
Figure 8: Row Timing and FRAME_VALID/LINE_VALID Signals
D
OUT9
LINE_VALID
Number of master clocks
-D
FRAME_VALID
PIXCLK
OUT0
LINE_VALID
Figure 7: Timing Example of Pixel Data
Blanking
(9:0)
P 0
P
A
(9:0)
P 1
Q
(9:0)
9
Valid Image Data
P2
1/4-INCH VGA CMOS ACTIVE-PIXEL
. . .
. . .
. . .
MT9V011 can be programmed to move the PIX CLK
edge relative to the D
master clock, in steps of one-half of a master clock.
This can be achieved by programming the corre-
sponding bits in Reg0x07.
in Table 3.
The parameters P , A , and Q in Figure 8 are defined
(9:0)
P 3
A
Micron Technology, Inc., reserves the right to change products or specifications without notice.
(9:0)
P 4
Q
. . . .
. . . .
. . . .
. . . .
DIGITAL IMAGE SENSOR
A
P n-1
(9:0)
P
(9:0)
P n
OUT
Blanking
transitions from +1 to -1
©2004 Micron Technology, Inc.
Preliminary