m470l6423en0-cb3 Samsung Semiconductor, Inc., m470l6423en0-cb3 Datasheet - Page 11
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m470l6423en0-cb3
Manufacturer Part Number
m470l6423en0-cb3
Description
512mb Unbuffered Sodimm Based On Stsop
Manufacturer
Samsung Semiconductor, Inc.
Datasheet
1.M470L6423EN0-CB3.pdf
(13 pages)
512MB Unbuffered SODIMM(based on sTSOP)
8. I/O Setup/Hold Plateau Derating
9. I/O Delta Rise/Fall Rate(1/slew-rate) Derating
10. This parameter is fir system simulation purpose. It is guranteed by design.
11. For each of the terms, if not already an integer, round to the next highest integer. tCK is actual to the system clock cycle time.
<Reference>
The following table specifies derating values for the specifications listed if the single-ended clock skew rate is less than 1.0V/ns.
This derating table is used to increase tDS/tDH in the case where the input level is flat below VREF r310mV for a duration of
This derating table is used to increase t
up to 2ns.
is calated as 1/SlewRate1-1/SlewRate2. For example, if slew rate 1 = 5V/ns and slew rate 2 =.4V/ns then the Delta Rise/Fall
Rate =-0/5ns/V. Input S/H slew rate based on larger of AC-AC delta rise/fall rate and DC-DC delta rise/fall rate.
(Single ended)
CK slew rate
Delta Rise/Fall Rate
0.75V/ns
1.0V/ns
0.5V/ns
I/O Input Level
r280
(ns/V)
r0.25
(mV)
r0.5
0
'tIH/tIS
+100
(ps)
+50
0
DS
/t
'tDS
'tDS
+100
(ps)
+50
(ps)
+50
DH
0
in the case where the DQ and DQS slew rates differ. The Delta Rise/Fall Rate
'tDSS/tDSH
+100
(ps)
+50
0
'tDH
'tDH
+100
(ps)
+50
(ps)
+50
0
'tAC/tDQSCK
+100
(ps)
+50
0
'tLZ(min)
-100
(ps)
-50
0
Rev. 1.3 March. 2004
'tHZ(max)
+100
(ps)
+50
0
DDR SDRAM