k9f1g08q0a Samsung Semiconductor, Inc., k9f1g08q0a Datasheet - Page 10

• Manufacturer Part Number: k9f1g08q0a
• Description: 128m X 8 Bit Nand Flash Memory
• Manufacturer: Samsung Semiconductor, Inc.

K9F1G08Q0A
K9F1G08U0A
VALID BLOCK
NOTE :
1. The
2. The 1st block, which is placed on 00h block address, is guaranteed to be a valid block, does not require Error Correction up to 1K program/erase
AC TEST CONDITION
(K9F1G08X0A-XCB0 :TA=0 to 70 C, K9F1G08X0A-XIB0:TA=-40 to 85 C
K9F1G08Q0A : Vcc=1.70V~1.95V, K9F1G08U0A : Vcc=2.7V~3.6V unless otherwise noted)
CAPACITANCE
NOTE : Capacitance is periodically sampled and not 100% tested.
MODE SELECTION
NOTE : 1. X can be V
Input Pulse Levels
Input Rise and Fall Times
Input and Output Timing Levels
Output Load
Valid Block Number
Input/Output Capacitance
Input Capacitance
blocks is presented with both cases of invalid blocks considered. Invalid blocks are defined as blocks that contain one or more bad bits. Do not erase
or program factory-marked bad blocks
cycles.
CLE
H
H
X
X
X
X
X
L
L
L
L
K9F1G08X0A
2. WP should be biased to CMOS high or CMOS low for standby.
Parameter
Item
ALE
IL
X
H
H
L
L
L
L
X
X
X
X
or V
(1)
may include invalid blocks when first shipped. Additional invalid blocks may develop while being used. The number of valid
(
T
IH.
A
Parameter
=25 C, V
CE
X
X
X
X
H
L
L
L
L
L
L
.
CC
Refer to the attached technical notes for appropriate management of invalid blocks.
=1.8V/3.3V, f=1.0MHz)
Symbol
Symbol
C
N
C
VB
I/O
IN
WE
H
X
X
X
X
X
Test Condition
V
V
1004
IL
IN
Min
RE
H
H
H
H
H
H
X
X
X
X
=0V
=0V
10
1 TTL GATE and CL=30pF
K9F1G08Q0A
0V/V
0V to Vcc
WP
H
H
H
H
H
Vcc/2
X
X
X
X
L
5ns
CC
(2)
Typ.
Min
-
-
-
Data Input
Data Output
During Read(Busy)
During Program(Busy)
During Erase(Busy)
Write Protect
Stand-by
Read Mode
Write Mode
FLASH MEMORY
Command Input
Address Input(4clock)
Command Input
Address Input(4clock)
1024
Max
Max
1 TTL GATE and CL=50pF
10
10
Mode
K9F1G08U0A
0V to Vcc
Vcc/2
5ns
Blocks
Unit
Unit
pF
pF