mt16hts25664hy-53e Micron Semiconductor Products, mt16hts25664hy-53e Datasheet - Page 10
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mt16hts25664hy-53e
Manufacturer Part Number
mt16hts25664hy-53e
Description
2gb, 4gb X64, Dr 200-pin Ddr2 Sdram Sodimm
Manufacturer
Micron Semiconductor Products
Datasheet
1.MT16HTS25664HY-53E.pdf
(11 pages)
Serial Presence-Detect
Table 11:
Table 12:
Serial Presence-Detect Data
PDF: 09005aef821e5bf3/Source: 09005aef82198d54
HTS16C256_512x64H.fm - Rev. B 10/07 EN
Parameter/Condition
Parameter/Condition
Supply voltage
Input high voltage: Logic 1; All inputs
Input low voltage: Logic 0; All inputs
Output low voltage: I
Input leakage current: V
Output leakage current: V
Standby current
Power supply current, READ: SCL clock frequency = 100 kHz
Power supply current, WRITE: SCL clock frequency = 100 kHz
SCL LOW to SDA data-out valid
Time the bus must be free before a new transition can start
Data-out hold time
SDA and SCL fall time
Data-in hold time
Start condition hold time
Clock HIGH period
Noise suppression time constant at SCL, SDA inputs
Clock LOW period
SDA and SCL rise time
SCL clock frequency
Data-in setup time
Start condition setup time
Stop condition setup time
WRITE cycle time
Serial Presence-Detect EEPROM DC Operating Conditions
Serial Presence-Detect EEPROM AC Operating Conditions
Notes:
OUT
IN
= 3mA
OUT
= GND to V
1. To avoid spurious start and stop conditions, a minimum delay is placed between SCL = 1 and
2. This parameter is sampled.
3. For a restart condition or following a WRITE cycle.
4. The SPD EEPROM WRITE cycle time (
For the latest serial presence-detect data, refer to Micron’s SPD page:
www.micron.com/SPD.
= GND to V
the falling or rising edge of SDA.
sequence to the end of the EEPROM internal ERASE/PROGRAM cycle. During the WRITE
cycle, the EEPROM bus interface circuit is disabled, SDA remains HIGH due to pull-up resis-
tance, and the EEPROM does not respond to its slave address.
DD
DD
2GB, 4GB (x64, DR) 200-Pin DDR2 SDRAM SODIMM
10
t
Symbol
t
t
t
t
HD:DAT
HD:STA
SU:DAT
SU:STA
SU:STO
t
t
t
Symbol
t
HIGH
LOW
f
WRC
V
t
t
BUF
SCL
AA
DH
t
t
t
DDSPD
I
V
I
R
t
F
V
CC
I
V
I
I
CC
WRC) is the time from a valid stop condition of a write
I
LO
SB
OL
LI
IH
IL
W
R
Micron Technology, Inc., reserves the right to change products or specifications without notice.
Min
200
100
V
0.2
1.3
0.6
0.6
1.3
0.6
0.6
0
–
–
–
–
–
DDSPD
Min
0.10
0.05
–0.6
1.7
1.6
0.4
2.0
–
× 0.7
Max
300
400
0.3
0.9
50
10
Serial Presence-Detect
–
–
–
–
–
–
–
–
–
V
V
©2006 Micron Technology, Inc. All rights reserved.
DDSPD
DDSPD
Max
3.6
0.4
3.0
3.0
4.0
1.0
3.0
+ 0.5
× 0.3
Units
kHz
ms
µs
µs
ns
ns
µs
µs
µs
ns
µs
µs
ns
µs
µs
Units
Notes
mA
mA
µA
µA
µA
V
V
V
V
1
2
2
3
4