mt18vdvf6472d Micron Semiconductor Products, mt18vdvf6472d Datasheet - Page 15
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mt18vdvf6472d
Manufacturer Part Number
mt18vdvf6472d
Description
Ddr Sdram Vlp Registered Dimm
Manufacturer
Micron Semiconductor Products
Datasheet
1.MT18VDVF6472D.pdf
(38 pages)
- Current page: 15 of 38
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DLL Enable/Disable
Figure 6:
PDF: 09005aef81c73825/Source: 09005aef81c73837
DVF18C64_128x72D_2.fm - Rev. A 8/05 EN
Extended Mode Register Definition Diagram
Notes: 1. BA1 and BA0 (E14 and E13) must be “0, 1” to select the Extended Mode Register (vs. the
The DLL must be enabled for normal operation. DLL enable is required during power-
up initialization and upon returning to normal operation after having disabled the DLL
for the purpose of debug or evaluation. When the device exits self refresh mode, the DLL
is enabled automatically. Any time the DLL is enabled, 200 clock cycles with CKE HIGH
must occur before a READ command can be issued.
E12
2. QFC# is not supported.
0
–
E11
0 1
14
BA1 BA0
base Mode Register).
0
–
1 1
E10
13
0
–
12
E9
A12
0
–
11
E8
A11
0
–
E7
10
0
–
A10
E6 E5
0
–
9
Operating Mode
A9
0
–
8
A8
E4
0
–
7
A7 A6 A5 A4 A3
E3
0
–
6
512MB, 1GB: (x72, DR) 184-Pin DDR VLP RDIMM
E2
0
–
5
2
15
4
E1,
Valid
–
3
E0
2
A2 A1 A0
DS
Operating Mode
Reserved
Reserved
1
Micron Technology, Inc., reserves the right to change products or specifications without notice.
E1
0
DLL
0
E0
0
1
Extended Mode
Register (Ex)
Drive Strength
Address Bus
Normal
Disable
Enable
DLL
Extended Mode Register
©2003, 2004, 2005 Micron Technology, Inc. All rights reserved.
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