k4d28163hd Samsung Semiconductor, Inc., k4d28163hd Datasheet - Page 7

• Manufacturer Part Number: k4d28163hd
• Description: 128mbit Ddr Sdram
• Manufacturer: Samsung Semiconductor, Inc.

FUNCTIONAL DESCRIPTION
• Power-Up Sequence
DDR SDRAMs must be powered up and initialized in a predefined manner to prevent undefined operations.
K4D28163HD
Command
*
*1
Power up & Initialization Sequence
1,2
CK,CK
stable for 200us
7. Issue precharge command for all banks of the device.
5. Issue a EMRS command to enable DLL
8. Issue at least 2 or more auto-refresh commands.
9. Issue a mode register set command with A8 to low to initialize the mode register.
1. Apply power and keep CKE at low state (All other inputs may be undefined)
3. The minimum of 200us after stable power and clock(CK,CK ), apply NOP and take CKE to be high .
4. Issue precharge command for all banks of the device.
Inputs must be
2. Start clock and maintain stable condition for minimum 200us.
6. Issue a MRS command to reset DLL. The additional 200 clock cycles are required to lock the DLL.
*1 The additional 200cycles of clock input is required to lock the DLL after enabling DLL.
*2 Sequence of 6&7 is regardless of the order.
- Apply VDD before VDDQ .
- Apply VDDQ before VREF & VTT
0
ALL Banks
precharge
1
2
t
RP
3
E M R S
4
2 Clock min.
5
DLL Reset
MRS
6
2 Clock min.
7
ALL Banks
precharge
8
- 7 -
9
tRP
10
1st Auto
Refresh
200 Clock min.
11
t
12
RFC
13
2nd Auto
Refresh
14
128M DDR SDRAM
15
t
RFC
Rev. 1.4(Aug. 2002)
16
17
R e g i s t e r S e t
Mode
18
2 Clock min.
19
C o m m a n d
A n y