k4d28163hd Samsung Semiconductor, Inc., k4d28163hd Datasheet - Page 12

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k4d28163hd

Manufacturer Part Number
k4d28163hd
Description
128mbit Ddr Sdram
Manufacturer
Samsung Semiconductor, Inc.
Datasheet

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AC OPERATING TEST CONDITIONS
CAPACITANCE
DECOUPLING CAPACITANCE GUIDE LINE
Recommended decoupling capacitance added to power line at board.
Note :
K4D28163HD
Decoupling Capacitance between V
Decoupling Capacitance between V
Input reference voltage for CK(for single ended)
CK and CK signal maximum peak swing
CK signal minimum slew rate
Input Levels(V
Input timing measurement reference level
Output timing measurement reference level
Output load condition
Input capacitance( CK, CK )
Input capacitance(A
Input capacitance
( CKE, CS, RAS,CAS, WE )
Data & DQS input/output capacitance(DQ
Input capacitance(DM0 ~ DM3)
1. V
2. V
All V
All V
DD
SS
Parameter
and V
DD
SS
and V
pins are connected in chip. All V
pins are connected in chip. All V
IH
SSQ
DDQ
/V
0
Parameter
IL
pins are separated each other
~A
Parameter
pins are separated each other.
)
(V
11
DD
, BA
Output
=3.3V, T
0
~BA
DD
DDQ
1
)
and V
A
and V
= 25 C, f=1MHz)
0
~ D Q
SS
SSQ
SSQ
DDQ
31
)
pins are connected in chip.
pins are connected in chip.
(Fig. 1) Output Load Circuit
(V
Z0=50
DD
- 12 -
=3.3V 5%, T
Symbol
C
C
LOAD
C
C
C
C
OUT
IN1
IN2
IN3
IN4
V
REF
=30pF
Symbol
C
C
+0.35/V
0.50*V
See Fig.1
DC1
DC2
Value
V
A
V
1.5
1.0
V
REF
= 0 to 65 C)
tt
tt
=0.5*V
DDQ
R
REF
T
=50
Min
1.0
1.0
1.0
1.0
1.0
-0.35
DDQ
V
=0.5*V
REF
0.1 + 0.01
0.1 + 0.01
Value
DDQ
128M DDR SDRAM
Max
5.0
4.0
4.0
6.5
6.5
Rev. 1.4(Aug. 2002)
Unit
V/ns
V
V
V
V
V
Unit
uF
uF
Unit
pF
pF
pF
pF
pF
Note

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